From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Tue, 23 Nov 2021 13:13:05 +0100 Subject: [PATCH] ARM: dts: BCM5301X: Switch back to old clock nodes names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit First of all using the same node name prefix resulted in trying to register 2 clocks under the same "clock-controller" name: [ 0.000000] __clk_core_init: clk clock-controller already initialized [ 0.000000] ------------[ cut here ]------------ [ 0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/bcm/clk-iproc-pll.c:802 iproc_pll_clk_setup+0x4c8/0x4f4 [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.80 #0 [ 0.000000] Hardware name: BCM5301X [ 0.000000] [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [ 0.000000] [] (show_stack) from [] (dump_stack+0x94/0xa8) [ 0.000000] [] (dump_stack) from [] (__warn+0xb8/0x114) [ 0.000000] [] (__warn) from [] (warn_slowpath_fmt+0x68/0x78) [ 0.000000] [] (warn_slowpath_fmt) from [] (iproc_pll_clk_setup+0x4c8/0x4f4) [ 0.000000] [] (iproc_pll_clk_setup) from [] (nsp_genpll_clk_init+0x30/0x38) [ 0.000000] [] (nsp_genpll_clk_init) from [] (of_clk_init+0x118/0x1f8) [ 0.000000] [] (of_clk_init) from [] (time_init+0x24/0x30) [ 0.000000] [] (time_init) from [] (start_kernel+0x398/0x50c) [ 0.000000] [] (start_kernel) from [<00000000>] (0x0) [ 0.000000] ---[ end trace fe236bfe9559ee50 ]--- Secondly using any other names than "lcpll0" and "genpll" breaks output clocks: $ cat /sys/kernel/debug/clk/usbclk/clk_rate 0 For some reason iproc_clk_recalc_rate() gets called with "parent_rate" argument 0 whenever clocks aren't named "lcpll0" and "genpll". Signed-off-by: Rafał Miłecki --- arch/arm/boot/dts/bcm5301x.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -421,7 +421,7 @@ #address-cells = <1>; #size-cells = <1>; - lcpll0: clock-controller@100 { + lcpll0: lcpll0@100 { #clock-cells = <1>; compatible = "brcm,nsp-lcpll0"; reg = <0x100 0x14>; @@ -430,7 +430,7 @@ "sdio", "ddr_phy"; }; - genpll: clock-controller@140 { + genpll: genpll@140 { #clock-cells = <1>; compatible = "brcm,nsp-genpll"; reg = <0x140 0x24>;