Commit Graph

15 Commits

Author SHA1 Message Date
Marius Durbaca f7c732bf9e rockchip: add Radxa E25 board support
Radxa E25 is a network application carrier board for the Radxa CM3
Industrial (CM3I) SoM, which is based on the Rockchip RK3568 SoC.

It has the following features:

- MicroSD card socket, on board eMMC flash
- 2x 2.5GbE Realtek RTL8125B Ethernet transceiver
- 1x USB Type-C port (Power and Serial console)
- 1x USB 3.0 OTG port
- mini PCIe socket (USB or PCIe)
- ngff PCIe socket (USB or SATA)
- 1x User LED and 16x RGB LEDs
- 26-pin expansion header

Installation:
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: Marius Durbaca <mariusd84@gmail.com>
2024-03-23 07:55:43 +01:00
Marius Durbaca c22c63bce3 rockchip: add Radxa CM3 IO board support
Hardware
--------
RockChip RK3566 ARM64 (4 cores)
- up to 8GB LPDDR4X
- 1x HDMI,
- 2x MIPI DSI
- 2x MIPI CSI2
- 1x eDP
- 1x PCIe card
- 2x SATA
- 2x USB 2.0 Host
- 1x USB 3.0
- 1x USB 2.0 OTG
- 10/100/1000 Base-T
- microSD slot
- 40-pin GPIO expansion header
- 12V DC

Radxa CM3 needs to mount on top of this IO board in order to create
complete Radxa CM3 IO board platform.

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Reviewed-by: Tianling Shen <cnsztl@immortalwrt.org>
Signed-off-by: Marius Durbaca <mariusd84@gmail.com>
2024-02-21 13:29:26 +01:00
Tianling Shen afca1236f3 rockchip: add NanoPi R4S Enterprise Edition build
FriendlyElec renamed the NanoPi R4S board with EEPROM (mac address)
to "enterprise" edition, and it was added as a "new" board in upstream
kernel.

This patch switched to use that upstreamed dts and removed local
EEPROM patch.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2024-02-19 20:52:06 +01:00
Tianling Shen 782266473d rockchip: add NanoPi R2C Plus support
The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board
eMMC flash (8G) included.

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2024-02-19 16:23:32 +01:00
Furong Xu 314af7018a rockchip: make SMP affinity of RTL8152 on XHCI more robust
XHCI bus numbers are assigned dynamically, it may varies among boards,
match the device irq name with regexp, drop the hardcoded name.

Signed-off-by: Furong Xu <xfr@outlook.com>
2023-12-15 18:02:43 +01:00
Furong Xu 1438bc583c rockchip: fix eth1 irq affinity
NanoPi R2S and some other RK3328 boards use RTL8152 as eth1,
which is connected to xhci-hcd:usb1 but not xhci-hcd:usb3

|:~# cat /proc/interrupts
|           CPU0       CPU1       CPU2       CPU3
| 11:      53449     171813     129595      87823     GICv2  30 Level     arch_timer
| 18:          0          0          0          0     GICv2  94 Level     rockchip_usb2phy
| 19:          0          0          0          0     GICv2  32 Level     ff1f0000.dma-controller
| 20:          0          0          0          0     GICv2  33 Level     ff1f0000.dma-controller
| 21:          4          0          0          0     GICv2  89 Level     ttyS2
| 22:          0          0          0          0     GICv2  43 Level     ff350800.iommu
| 23:          0          0          0          0     GICv2 106 Level     ff360480.iommu
| 24:          0    1417932          0          0     GICv2  56 Level     eth0
| 25:        334          0          0    4422194     GICv2  99 Level     xhci-hcd:usb1
| 26:          0          0          0          0     GICv2  48 Level     ehci_hcd:usb3
| 27:          0          0          0          0     GICv2  49 Level     ohci_hcd:usb2
| 28:       3285          0          0          0     GICv2  69 Level     ff160000.i2c
| 29:          0          0          0          0  rockchip_gpio_irq  24 Level     rk805
| 30:          0          0          0          0     rk805   0 Edge      rk805_pwrkey_fall
| 35:          0          0          0          0     rk805   5 Edge      RTC alarm
| 37:          0          0          0          0     rk805   7 Edge      rk805_pwrkey_rise
| 38:          0          0          0          0     GICv2  90 Level     rockchip_thermal
| 39:          0          0          0          0     GICv2  72 Edge      ff1a0000.watchdog
| 40:       2601          0          0          0     GICv2  44 Level     dw-mci
| 41:          0          0          0          0  rockchip_gpio_irq   0 Edge      keys
|IPI0:      1559       1208        893       1131       Rescheduling interrupts
|[...]

Fix 40-net-smp-affinity to match the correct device irq name.

Signed-off-by: Furong Xu <xfr@outlook.com>
2023-12-12 19:50:43 +01:00
Tianling Shen 4e09722a68 rockchip: add NanoPi R5C support
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
1GB or 4GB LPDDR4X RAM
2x 2500 Base-T
4 LEDs (LAN / WAN / WIFI / POWER)
1 Button (Reset)
8GB or 32GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-11-26 19:44:56 +01:00
Tianling Shen c06a71f0b3 rockchip: add NanoPi R5S support
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
2GB or 4GB LPDDR4X RAM
1x 1000 Base-T
2x 2500 Base-T
4 LEDs (LAN1 / LAN2 / WAN / POWER)
8GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Tested-by: Packet Please <pktpls@systemli.org>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-11-26 19:44:56 +01:00
Tianling Shen 32d5921b8b rockchip: add Orange Pi R1 Plus LTS support
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.

Tested-by: Volkan Yetik <no3iverson@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-31 21:41:46 +02:00
Tianling Shen ab641efe69 rockchip: add Orange Pi R1 Plus support
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.

This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.

Note: booting from SPI is currently unsupported, you have to install
the image on a SD card.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-31 21:41:46 +02:00
Tianling Shen 8f578c15b3 rockchip: add NanoPi R2C support
The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-18 17:42:53 +02:00
Ronny Kotzschmar 9b00e97956
rockchip: reliably distribute net interrupts
On the NanoPI R4S it takes an average of 3..5 seconds for the network devices
to appear in '/proc/interrupts'.
Wait up to 10 seconds to ensure that the distribution of the interrupts
really happens.

Signed-off-by: Ronny Kotzschmar <ro.ok@me.com>
2022-07-07 13:13:26 +02:00
Tianling Shen b721579842 rockchip: add NanoPi R4S support
Hardware
--------
RockChip RK3399 ARM64 (6 cores)
4GB LPDDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

=====================================
NOTICE FOR USERS WHO USE 1GB VERSION:
     BY NOW IT IS NOT SUPPORTED
====================================

[initialed target]
Co-developed-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[fixed bootscript]
Co-developed-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-06-10 10:34:44 +02:00
Adrian Schmutzler 84fc80dd66 rockchip: remove useless echo in 40-net-smp-affinity
The command in the $() brackets will already provide the same output.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-08-17 23:13:57 +02:00
David Bauer 7a4fc8906c rockchip: distribute net interrupts
This adds a hotplug script for distributing interrupts of eth0 and eth1
across different cores. Otherwise the forwarding performance between
eth0 and eth1 is severely affected.

The existing SMP distribution mechanic in OpenWrt can't be used here, as
the actual device IRQ has to be moved to dedicated cores. In case of
eth1, this is in fact the USB3 controller.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-07-28 15:52:44 +02:00