The Netgear GS110TPP v1 switch cannot reliably perform cold reboots
using the system's internal reset controller.
On this device, and the other supported Netgear switches, internal GPIO
line 13 is connected to the system's hard reset logic. Expose this GPIO
on all systems to ensure restarts work properly.
Cc: Raylynn Knight <rayknight@me.com>
Cc: Michael Mohr <akihana@gmail.com>
Cc: Stijn Segers <foss@volatilesystems.org>
Cc: Stijn Tintel <stijn@linux-ipv6.be>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Bjørn Mork <bjorn@mork.no>
Add the gpio-restart driver to the realtek build. This way devices,
which cannot reliably perform resets using the SoC's internal reset
logic, can use a GPIO line to drive the SoC's hard reset input.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The internal GPIO controller on RTL838x is also an IRQ controller, which
requires the 'interrupt-controller' and '#interrupts-cells' properties
to be present in the device tree.
Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Some devices are assigned globally unique MAC addresses for all
ports. These are stored by U-Boot in the second U-Boot enviroment
("sysinfo") as a range of start and end address.
Use the full range if provided.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The default management interface should be easy to find for users
doing "blind" installations without console access. There are
already multiple examples in the forum of advanced early adopters
having problems locating the management interface after installing
OpenWrt.
Requiring tagged VLAN configration to access the initial management
interface creates unnecessary hassle at best. Errors on the other
end are close to impossible to debug without console access, even
for advanced users. Less advanced users might have problems with
the concept of VLAN tagging.
Limiting management access to a single arbitrary port among up to
52 possible LAN ports makes this even more difficult, for no
reason at all. Users might have reasons to use a different port
for management. And they might even have difficulties using the
OpenWrt selected one. The port might be the wrong type for their
management link (e.g copper instead of fibre). Or they might
depend on PoE power from a device which they can't reconfigure.
User expectations will be based on
- OpenWrt defaults for other devices
- stock firmware default for the device in question
- common default behaviour of similar devices
All 3 cases point to a static IP address accessible on the native
VLAN of any LAN port. A switch does not have any WAN port. All
ports are LAN ports.
This changes the default network configuration in line with these
expectations.
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
All patches automatically rebased.
Build system: x86_64
Build-tested: ramips/mt7621*
*I am hit with the binutils 2.37 bug so I had to revert 7f1edbd412
in order to downgrade to 2.35.1
Signed-off-by: John Audia <graysky@archlinux.us>
By dropping _machine_restart, users can provide more reliable or
device-specific restart modes.
_machine_halt was already removed in commit f4b687d1f0 ("realtek: use
kernel defined halt"), but quietly reintroduced in commit 8faffa00cb
("realtek: add support for the RTL9300 timer"). Let's remove it again.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Add and enable the Realtek Otto WDT peripheral found on these SoCs.
Default all devices to use standard (cold) reboot and "soc" resets.
Devices that require the PLL value fixup before restarting, should pick
the "cpu" or "software" reset mode. These devices also need to provide a
custom reboot mode, by adding the reboot argument to the kernel command
line:
WDT reset mode | kernel reboot mode
----------------+---------------------------------------
soc | reboot=cold (default if not specified)
cpu | reboot=warm
software | reboot=software
Preferrably, these devices should use an alternative restart method like
gpio-restart to provide reliable restarts.
Note that watchdog restarts are not yet exposed, since the
_machine_restart override is still present.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Add patch submitted upstream to linux-watchdog and replace the MIPS
architecture symbols. Requires one extra patch for the DIV_ROUND_*
macros, which have moved to a different header since 5.10.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
The CPU peripherals on RTL83xx/RTL930x are connected to the CPU via the
Lexra bus. This bus can provide a clock signal to these peripherals, but
no clock driver is currently available. Instead, use a fixed-clock to
provide the clock frequency, and update the dependent peripherals.
Lexra bus clock frequencies:
- RTL838x: 200MHz
- RTL839x: 200MHz
- RTL930x: 175MHz
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
All current devices use identical bootargs, so let's move that to the
common devicetree includes.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Recent versions of Realtek's SDK reset both the ethernet NIC and queues
(SW_NIC_RST and SW_Q_RST bits) when initialising the hardware.
Furthermore, when issuing a CPU reset on the Zyxel GS1900-8 (not
supported by any current driver), the networking part of the SoC is not
reset. This leads to unresponsive network after the restart. By
resetting both the ethernet NIC and queues, networking always comes up
reliably.
Suggested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Backport the patch queued upstream for 5.16. The patch differs slightly
from the upstream patch due to an upstream change that added a
convenience function.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Deleted (upstreamed):
bcm27xx/patches-5.10/950-0145-xhci-add-quirk-for-host-controllers-that-don-t-updat.patch [1]
Manually rebased:
bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
Note: although automatically rebaseable, the last patch has been edited to avoid
conflicting bit definitions.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.10.y&id=b6f32897af190d4716412e156ee0abcc16e4f1e5
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Commit 03e1d93e07 ("realtek: add driver support for routing
offload") added routing offload for IPv4, but broke IPv6 routing
completely. The routing table is empty and cannot be updated:
root@gs1900-10hp:~# ip -6 route
root@gs1900-10hp:~# ip -6 route add unreachable default
RTNETLINK answers: Invalid argument
As a side effect, this breaks opkg on IPv4 only systems too,
since uclient-fetch fails when there are no IPv6 routes:
root@gs1900-10hp:~# uclient-fetch http://192.168.99.1
Downloading 'http://192.168.99.1'
Failed to send request: Operation not permitted
Fix by returning NOTIFY_DONE when offloading is unsupported, falling
back to default behaviour.
Fixes: 03e1d93e07 ("realtek: add driver support for routing offload")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The current rule produces empty trailers, causing the OEM firmware
update application to reject our images.
The double expansion of a makefile variable does not work inside
shell code. The second round is interpreted as a shell expansion,
attempting to run the command ZYXEL_VERS instead of expanding the
$(ZYXEL_VERS) makefile variable.
Fix by removing one level of variable indirection.
Fixes: c6c8d597e1 ("realtek: Add generic zyxel_gs1900 image definition")
Tested-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The otto GPIO driver does not work with rtl9300 SoCs. Add
the legacy driver again and use that by default in the 9300 .dtsi
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
RTL8393 SoCs older than Revision C hang on accesses to PHYs with PHY address
larger or equal to the CPU-port (52). This will make scanning the MDIO bus
hang forever. Since the RTL8390 platform does not support more than
52 PHYs, return -EIO for phy addresses >= 52. Note that the RTL8390 family
of SoCs has a fixed mapping between port number and PHY-address.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds SoC specific routing offload implementations for
RTL8380/90 and RTL9300. RTL83xx supports merely nexthop
routing, RTL9300 full host and prefix routes.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Add generic support for listening to FIB and Event notifier updates and
use this information to hook into the L3 hardware capabilities of the
RTL SoCs.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The ingress filter registers use 2 bits for each port to define the filtering
state, whereas the egress filter uses 1 bit. So for for the ingress filter
the register offset for a given port is:
(port >> 4) << 4: since there are 16 entries in a register of 32 bits
and for the egress filter:
(port >> 5) << 4: since there are 32 entries in a register of 32 bits
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Configure a sane L2 learning configuration upon DSA driver load so that the
switch can start learning L2 addresses. Also configure the correct flood masks
for broadcast and unknown unicast traffice.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds RTL93xx-specific MAC configuration routines that allow also configuration
of 10GBit links for phylink. There is support for the Realtek-specific HISGMI
protocol.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for offloading TC flower by using the Packet Inspection Engine
of the RTL-SoCs. Basic infrastructure support is provide with callbacks to the
tc subsystem and support for HW packet counters.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
All RTL SoCs addresss PHYs via their port number, which is mapped to an
SMI address. Add support for configuring this mapping via the .dts on all
SoCs apart from the 839x, where the mapping to the 64 ports is fixed.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
On RTL83xx enable learning of the MAC source address of the CPU port
from outgoing packets. Add documentation on bit fields. On RTL93xx
enable port-mask usage and the use of internal priority, these
SoCs automatically learn the MAC.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Remove the storm control and attack warnings from the IRQ handler
of the Ethernet driver. There was no consequence to the detection
and the kernel can also handle at least the attacks itself.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This enlarges the size of the TX ring buffer, which prevents warnings
when the buffer runs out of space.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The bootloader can leave the GPIO expander in a state which doesn't have
output drivers enabled so GPIOs will properly work for input but output
operations will have no effect.
To avoid disrupting the boot in case the bootloader left direction and
data registers in an inconsistent state (e.g. pulling SoC's reset to 0)
reconfigure everything as input.
Reviewed-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
This patch adds "KERNEL_TESTING_PATCHVER:=5.10" to the Makefile in
realtek target to allow using Kernel 5.10 for testing.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
On the devices with PoE support, the secondary UART (uart1) on the SoC
is used to communicate between the SoC and controller.
Enable the secondary UART on the following devices:
- D-Link DGS-1210-10P
- Netgear GS110TPP v1
- Netgear GS310TP v1
- ZyXEL GS1900-8HP v1/v2
- ZyXEL GS1900-10HP
- ZyXEL GS1900-24HP v2
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Sander Vanheule
Adrian Schmutzler