Commit Graph

5 Commits

Author SHA1 Message Date
Hauke Mehrtens 6c5c3a2edc kernel: Update to version 4.4.182
Fixes:
- CVE-2019-11479
- CVE-2019-11478
- CVE-2019-11477
- CVE-2019-11833
- CVE-2019-11091
- CVE-2018-12126
- CVE-2018-12130
- CVE-2018-12127
- CVE-2019-3882
- CVE-2019-6974
- CVE-2019-3819
- CVE-2019-7221
- CVE-2019-7222
- CVE-2019-3701
- CVE-2018-19985
- CVE-2018-1120
And probably more

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2019-06-18 20:45:33 +02:00
Stijn Segers bed0ee7cbf Kernel: bump 4.4 to 4.4.124 for 17.01
* Refreshed patches
 * Removed 087-Revert-led-core-Fix-brightness-setting-when-setting-.patch (applied upstream)

 Compile-tested on ar71xx, ramips/mt7621, x86/64
 Run-tested on ar71xx

Signed-off-by: Stijn Segers <foss@volatilesystems.org>
2018-04-01 15:21:14 +02:00
Stijn Segers b934aa2f21 kernel: update 17.01 kernel to 4.4.116
This bumps the 4.4. kernel in LEDE 17.01 to 4.4.116.
More Meltdown & Spectre mitigation.

* Refresh patches.
* Refresh x86/config for RETPOLINE.
* Deleted 8049-PCI-layerscape-Add-fsl-ls2085a-pcie-compatible-ID.patch (accepted upstream)
* Deleted 8050-PCI-layerscape-Fix-MSG-TLP-drop-setting.patch (accepted upstream)
* 650-pppoe_header_pad.patch does not apply anymore (code was replaced).

Bumps from 4.4.113 to 4.4.115 were handled by Kevin Darbyshire-Bryant.

Compile-tested on: ar71xx, ramips/mt7621, x86/64
Run-tested on: ar71xx, ramips/mt7621, x86/64

Signed-off-by: Stijn Segers <foss@volatilesystems.org>
2018-02-20 08:34:14 +01:00
Kevin Darbyshire-Bryant 79abb8f140 kernel: bump to 4.4.39
Bump & refresh patches for all 4.4 targets.

Compile & run tested: ar71xx Archer C7 v2

Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
2016-12-20 09:35:36 +01:00
Yutang Jiang ad907e1c03 layerscape: add 64b/32b target for ls1046ardb device
Add support for NXP layerscape ls1046ardb 64b/32b Dev board.

LS1046ARDB Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 512 Mbyte NAND flash
* Two 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
* On-board 4G eMMC
Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports
PCIe:
* PCIe1 (SerDes2 Lane0) to miniPCIe slot
* PCIe2 (SerDes2 Lane1) to x2 PCIe slot
* PCIe3 (SerDes2 Lane2) to x4 PCIe slot

* USB 3.0: one super speed USB 3.0 type A port, one Micro-AB port
* UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
2016-12-12 09:57:40 +01:00