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6c5c3a2edc
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8 Commits

Author SHA1 Message Date
Hauke Mehrtens
6c5c3a2edc kernel: Update to version 4.4.182 
Fixes:
- CVE-2019-11479
- CVE-2019-11478
- CVE-2019-11477
- CVE-2019-11833
- CVE-2019-11091
- CVE-2018-12126
- CVE-2018-12130
- CVE-2018-12127
- CVE-2019-3882
- CVE-2019-6974
- CVE-2019-3819
- CVE-2019-7221
- CVE-2019-7222
- CVE-2019-3701
- CVE-2018-19985
- CVE-2018-1120
And probably more

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 2019-06-18 20:45:33 +02:00
Koen Vandeputte
65044a50ab kernel: bump 4.4 to 4.4.167 
Refreshed all patches.

Removed upstreamed:
- 203-MIPS-ath79-fix-restart.patch
- 330-Revert-MIPS-BCM47XX-Enable-74K-Core-ExternalSync-for.patch
- 051-0001-ovl-rename-is_merge-to-is_lowest.patch
- 051-0002-ovl-override-creds-with-the-ones-from-the-superblock.patch
- 051-0005-ovl-proper-cleanup-of-workdir.patch

Altered patches:
- 201-extra_optimization.patch
- 304-mips_disable_fpu.patch

Compile-tested on: ar71xx, cns3xxx, imx6, mpc85xx
Runtime-tested on: ar71xx, cns3xxx, imx6, mpc85xx

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
 2018-12-18 15:14:39 +01:00
Hauke Mehrtens
2328977fed kernel: bump kernel 4.4 to 4.4.135 for 17.01 
* Refreshed patches

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 2018-06-02 15:13:12 +02:00
Stijn Segers
a9b6077402 kernel: bump kernel 4.4 to 4.4.126 for 17.01 
* Refreshed patches

Compile-tested: ar71xx, ramips/mt7621, x86/64
Run-tested: ar71xx

Signed-off-by: Stijn Segers <foss@volatilesystems.org>
 2018-04-14 14:52:49 +02:00
Hauke Mehrtens
69acb2533a kernel: update kernel 4.4 to version 4.4.79 
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 2017-07-28 23:49:35 +02:00
Hauke Mehrtens
88ca6390ea kernel: bump to 4.4.40 
Refresh patches on all 4.4 supported platforms.
Compile & run tested: lantiq/xrx200

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 2017-01-06 19:38:55 +01:00
Kevin Darbyshire-Bryant
79abb8f140 kernel: bump to 4.4.39 
Bump & refresh patches for all 4.4 targets.

Compile & run tested: ar71xx Archer C7 v2

Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
 2016-12-20 09:35:36 +01:00
Yutang Jiang
ad907e1c03 layerscape: add 64b/32b target for ls1046ardb device 
Add support for NXP layerscape ls1046ardb 64b/32b Dev board.

LS1046ARDB Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 512 Mbyte NAND flash
* Two 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
* On-board 4G eMMC
Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports
PCIe:
* PCIe1 (SerDes2 Lane0) to miniPCIe slot
* PCIe2 (SerDes2 Lane1) to x2 PCIe slot
* PCIe3 (SerDes2 Lane2) to x4 PCIe slot

* USB 3.0: one super speed USB 3.0 type A port, one Micro-AB port
* UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
 2016-12-12 09:57:40 +01:00