Changes from 5.4 to 5.10:
-------------------------
- patches from 5.4 are all upstream for 5.10 execpt for
0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
- disable block device data integrity (DIF/DIX/T10) in default config
(CONFIG_BLK_DEV_INTEGRITY)
This feature is only supported by:
- Enterprise SAS/SCSI HBAs and Disks
- Software raid
- NVMEs with metadata capabilities (most don't have this)
None of which are part of any octeontx boards.
- arm64 TEXT_OFFSET (0x80000) has been removed after 5.4
This will break Uimages with kernel load addresses that aren't 2MiB
aligned any longer. Resulting in the kernel silently fail to boot.
For Gatworks newport boards for example, the uimage kernel load
and execute address is 0x20080000. These need to be changed to
0x20000000 when running kernels beyond 5.4.
Tested-on: Gateworks Newport GW64xx
Signed-off-by: Daniel Danzberger <daniel@dd-wrt.com>
There is no such role as target maintainer anymore, one should always
send corresponding changes for the review and anyone from the commiters
is allowed to merge them or eventually use the hand break and NACK them.
Lets make it clear, that it is solely a community doing the maintenance
tasks.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Piotr Dymacz <pepe2k@gmail.com>
You should not define CFLAGS for the toolchain as this will also leak
into other targets if they share the same toolchain.
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The Cavium OCTEON TX is an ARM 64-bit SoC leveraging CPU cores and
periperhals from the Cavium ThunderX SoC.
This initial support provides a 4.14 kernel and kernel+initramfs that is
bootable on the Gateworks Newport GW630x as well as the Cavium sff8104
reference board.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
