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uboot-sunxi: add support for FriendlyARM NanoPi R1S H5 

Merged in https://github.com/u-boot/u-boot/commit/e7510d2,
adjust back to the current 2020.04 version.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
This commit is contained in:
Chukun Pan 2021-10-16 18:02:40 +08:00 committed by Hauke Mehrtens
parent cc2a8c2545
commit e43eb16efe
2 changed files with 281 additions and 0 deletions
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10
package/boot/uboot-sunxi/Makefile
View File

@ -270,6 +270,15 @@ define U-Boot/nanopi_neo2
ATF:=a64
endef
define U-Boot/nanopi_r1s_h5
BUILD_SUBTARGET:=cortexa53
NAME:=NanoPi R1S (H5)
BUILD_DEVICES:=friendlyarm_nanopi-r1s-h5
DEPENDS:=+PACKAGE_u-boot-nanopi_r1s_h5:arm-trusted-firmware-sunxi-a64
UENV:=a64
ATF:=a64
endef
define U-Boot/pine64_plus
BUILD_SUBTARGET:=cortexa53
NAME:=Pine64 Plus A64
@ -357,6 +366,7 @@ UBOOT_TARGETS := \
nanopi_neo_plus2 \
nanopi_neo2 \
nanopi_r1 \
nanopi_r1s_h5 \
orangepi_zero \
orangepi_r1 \
orangepi_one \

271
package/boot/uboot-sunxi/patches/253-sunxi-h5-add-support-for-nanopi-r1s-h5.patch Normal file
View File

@ -0,0 +1,271 @@
From e7510d24cab4741f72489b9d67c2d42b18fe5374 Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Sun, 10 Oct 2021 21:36:57 +0800
Subject: [PATCH] sunxi: Add support for FriendlyARM NanoPi R1S H5
This adds support for the NanoPi R1S H5 board.
Allwinner H5 SoC
512MB DDR3 RAM
10/100/1000M Ethernet x 2
RTL8189ETV WiFi 802.11b/g/n
USB 2.0 host port (A)
MicroSD Slot
Reset button
Serial Debug Port
WAN - LAN - SYS LED
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts | 195 +++++++++++++++++++++++
board/sunxi/MAINTAINERS | 5 +
configs/nanopi_r1s_h5_defconfig | 14 ++
4 files changed, 215 insertions(+)
create mode 100644 arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
create mode 100644 configs/nanopi_r1s_h5_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b8a382d1539..ed3d360bb10 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -638,6 +638,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-libretech-all-h5-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
+ sun50i-h5-nanopi-r1s-h5.dtb \
sun50i-h5-orangepi-zero-plus.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
diff --git a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
new file mode 100644
index 00000000000..55bcdf8d1a0
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2021 Chukun Pan <amadeus@jmu.edu.cn>
+ *
+ * Based on sun50i-h5-nanopi-neo-plus2.dts, which is:
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "FriendlyARM NanoPi R1S H5";
+ compatible = "friendlyarm,nanopi-r1s-h5", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &rtl8189etv;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ sys {
+ label = "nanopi:red:sys";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ lan {
+ label = "nanopi:green:lan";
+ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan {
+ label = "nanopi:green:wan";
+ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ r-gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0>, <1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ eeprom@51 {
+ compatible = "microchip,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8189etv: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 2543c94de79..56a0ee3689b 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -358,6 +358,11 @@ M: Jelle van der Waa <jelle@vdwaa.nl>
S: Maintained
F: configs/nanopi_neo_air_defconfig
+NANOPI-R1S-H5 BOARD
+M: Chukun Pan <amadeus@jmu.edu.cn>
+S: Maintained
+F: configs/nanopi_r1s_h5_defconfig
+
NANOPI-A64 BOARD
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig
new file mode 100644
index 00000000000..27cf172d72a
--- /dev/null
+++ b/configs/nanopi_r1s_h5_defconfig
@@ -0,0 +1,14 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881977
+# CONFIG_DRAM_ODT_EN is not set
+CONFIG_MACPWR="PD6"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-r1s-h5"
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y