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mediatek: reserve memory for ramoops and enable PSTORE 

Reserve 64KiB of memory for crashlogs and enable PSTORE feature in
kernel config for MT7622.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2021-05-07 16:53:09 +01:00
parent cc201759b6
commit e1adb1fa39
No known key found for this signature in database
GPG Key ID: 5A8F39C31C3217CA
6 changed files with 65 additions and 13 deletions
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33
target/linux/mediatek/mt7622/config-5.10
View File

@ -1,4 +1,5 @@
CONFIG_64BIT=y
# CONFIG_AHCI_MTK is not set
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MEDIATEK=y
@ -114,6 +115,8 @@ CONFIG_CRYPTO_ACOMP2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
@ -137,6 +140,7 @@ CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_MISC=y
CONFIG_DEVTMPFS=y
@ -155,12 +159,14 @@ CONFIG_DYNAMIC_DEBUG=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EINT_MTK=y
CONFIG_EXT4_FS=y
CONFIG_F2FS_FS=y
CONFIG_FIT_PARTITION=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
# CONFIG_FLATMEM_MANUAL is not set
CONFIG_FRAME_POINTER=y
CONFIG_F2FS_FS=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
# CONFIG_FUJITSU_ERRATUM_010001 is not set
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
@ -217,6 +223,7 @@ CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_JUMP_LABEL=y
CONFIG_LEDS_UBNT_LEDBAR=y
CONFIG_LIBFDT=y
@ -228,6 +235,7 @@ CONFIG_LZO_DECOMPRESS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEDIATEK_MT6577_AUXADC=y
CONFIG_MEDIATEK_WATCHDOG=y
CONFIG_MEMFD_CREATE=y
@ -245,10 +253,10 @@ CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_MTK=y
CONFIG_MTD_NAND_MTK_BMT=y
CONFIG_MTD_PARSER_TRX=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_PARSER_TRX=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MTD_UBI=y
@ -337,6 +345,20 @@ CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
CONFIG_PRINTK_TIME=y
CONFIG_PSTORE=y
# CONFIG_PSTORE_842_COMPRESS is not set
# CONFIG_PSTORE_BLK is not set
CONFIG_PSTORE_COMPRESS=y
CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_DEFLATE_COMPRESS=y
CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
# CONFIG_PSTORE_LZ4_COMPRESS is not set
# CONFIG_PSTORE_LZO_COMPRESS is not set
CONFIG_PSTORE_PMSG=y
CONFIG_PSTORE_RAM=y
# CONFIG_PSTORE_ZSTD_COMPRESS is not set
CONFIG_PWM=y
CONFIG_PWM_MEDIATEK=y
# CONFIG_PWM_MTK_DISP is not set
@ -349,6 +371,9 @@ CONFIG_RATIONAL=y
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_REALTEK_PHY=y
CONFIG_REED_SOLOMON=y
CONFIG_REED_SOLOMON_DEC8=y
CONFIG_REED_SOLOMON_ENC8=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
@ -363,7 +388,6 @@ CONFIG_RTC_DRV_MT7622=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTL8367S_GSW=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SATA_HOST=y
CONFIG_SCSI=y
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_SERIAL_8250_FSL=y
@ -430,6 +454,9 @@ CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
CONFIG_WATCHDOG_SYSFS=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

25
target/linux/mediatek/patches-5.10/105-dts-mt7622-enable-pstore.patch Normal file
View File

@ -0,0 +1,25 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -111,7 +111,7 @@
};
psci {
- compatible = "arm,psci-0.2";
+ compatible = "arm,psci-1.0";
method = "smc";
};
@@ -127,6 +127,13 @@
#size-cells = <2>;
ranges;
+ /* 64 KiB reserved for ramoops/pstore */
+ ramoops@0x42ff0000 {
+ compatible = "ramoops";
+ reg = <0 0x42ff0000 0 0x10000>;
+ record-size = <0x1000>;
+ };
+
/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x30000>;

2
target/linux/mediatek/patches-5.10/131-dts-mt7622-add-snand-support.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -554,6 +554,19 @@
@@ -561,6 +561,19 @@
status = "disabled";
};

4
target/linux/mediatek/patches-5.10/602-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch
View File

@ -281,7 +281,7 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
&pio {
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -794,45 +794,41 @@
@@ -801,45 +801,41 @@
#reset-cells = <1>;
};
@ -344,7 +344,7 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
@@ -844,15 +840,39 @@
@@ -851,15 +847,39 @@
#interrupt-cells = <1>;
};
};

4
target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
View File

@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -357,7 +357,7 @@
@@ -364,7 +364,7 @@
};
cci_control2: slave-if@5000 {
@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
interface-type = "ace";
reg = <0x5000 0x1000>;
};
@@ -969,6 +969,8 @@
@@ -976,6 +976,8 @@
power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
mediatek,ethsys = <&ethsys>;
mediatek,sgmiisys = <&sgmiisys>;

10
target/linux/mediatek/patches-5.10/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -805,6 +805,8 @@
@@ -812,6 +812,8 @@
reg = <0 0x1a143000 0 0x1000>;
reg-names = "port0";
mediatek,pcie-cfg = <&pciecfg>;
@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
@@ -822,6 +824,7 @@
@@ -829,6 +831,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
status = "disabled";
@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
@@ -848,6 +851,8 @@
@@ -855,6 +858,8 @@
reg = <0 0x1a145000 0 0x1000>;
reg-names = "port1";
mediatek,pcie-cfg = <&pciecfg>;
@ -36,7 +36,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
@@ -866,6 +871,7 @@
@@ -873,6 +878,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
status = "disabled";
@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
@@ -925,6 +931,11 @@
@@ -932,6 +938,11 @@
};
};