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rdc: remove 2.6.32 support 

SVN-Revision: 31596
This commit is contained in:
Gabor Juhos 2012-05-05 11:43:32 +00:00
parent 0e086cfaf7
commit e005aed223
16 changed files with 0 additions and 2888 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

295
target/linux/rdc/config-2.6.32
View File

@ -1,295 +0,0 @@
# CONFIG_4KSTACKS is not set
# CONFIG_60XX_WDT is not set
# CONFIG_64BIT is not set
# CONFIG_ACQUIRE_WDT is not set
# CONFIG_ADVANTECH_WDT is not set
# CONFIG_ALIM1535_WDT is not set
CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
CONFIG_ARCH_HAS_CPU_RELAX=y
CONFIG_ARCH_HAS_DEFAULT_IDLE=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_ARPD is not set
# CONFIG_AUDIT_ARCH is not set
# CONFIG_BASE_FULL is not set
CONFIG_BASE_SMALL=1
CONFIG_BCMA_POSSIBLE=y
CONFIG_BITREVERSE=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BOUNCE=y
CONFIG_BRIDGE=m
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_CMDLINE="console=uart,io,0x3f8 rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_COMPAT_VDSO is not set
# CONFIG_CPU5_WDT is not set
# CONFIG_CPU_SUP_AMD is not set
# CONFIG_CPU_SUP_CENTAUR is not set
# CONFIG_CPU_SUP_CYRIX_32 is not set
# CONFIG_CPU_SUP_INTEL is not set
# CONFIG_CPU_SUP_TRANSMETA_32 is not set
# CONFIG_CPU_SUP_UMC_32 is not set
# CONFIG_CS5535_GPIO is not set
# CONFIG_DCDBAS is not set
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEFAULT_IO_DELAY_TYPE=0
# CONFIG_DELL_RBU is not set
CONFIG_DEVPORT=y
# CONFIG_DMI is not set
CONFIG_DOUBLEFAULT=y
# CONFIG_EARLY_PRINTK is not set
# CONFIG_EDD is not set
# CONFIG_EUROTECH_WDT is not set
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_FIX_EARLYCON_MEM=y
# CONFIG_FRAME_POINTER is not set
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
# CONFIG_GENERIC_CPU is not set
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_ISA_DMA=y
# CONFIG_GENERIC_TIME_VSYSCALL is not set
# CONFIG_GEN_RTC is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_RDC321X=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
# CONFIG_HANGCHECK_TIMER is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_AOUT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_KMEMCHECK=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_ATOMIC_IOMAP=y
# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_KVM=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MMIOTRACE_SUPPORT=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
# CONFIG_HIGHMEM4G is not set
# CONFIG_HIGHMEM64G is not set
# CONFIG_HIGH_RES_TIMERS is not set
# CONFIG_HPET_TIMER is not set
# CONFIG_HP_WATCHDOG is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HW_RANDOM is not set
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_I6300ESB_WDT is not set
# CONFIG_I8K is not set
# CONFIG_IB700_WDT is not set
# CONFIG_IBMASR is not set
CONFIG_ILLEGAL_POINTER_VALUE=0
# CONFIG_IOMMU_API is not set
# CONFIG_IOMMU_HELPER is not set
# CONFIG_IOMMU_STRESS is not set
CONFIG_IO_DELAY_0X80=y
# CONFIG_IO_DELAY_0XED is not set
# CONFIG_IO_DELAY_NONE is not set
CONFIG_IO_DELAY_TYPE_0X80=0
CONFIG_IO_DELAY_TYPE_0XED=1
CONFIG_IO_DELAY_TYPE_NONE=3
CONFIG_IO_DELAY_TYPE_UDELAY=2
# CONFIG_IO_DELAY_UDELAY is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
# CONFIG_ISA is not set
CONFIG_ISA_DMA_API=y
# CONFIG_ISCSI_IBFT_FIND is not set
# CONFIG_IT8712F_WDT is not set
# CONFIG_IT87_WDT is not set
# CONFIG_ITCO_WDT is not set
# CONFIG_JFFS2_SUMMARY is not set
CONFIG_KTIME_SCALAR=y
# CONFIG_LEDS_ALIX2 is not set
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_TRIGGER_NETDEV is not set
# CONFIG_LEDS_TRIGGER_TIMER is not set
CONFIG_LLC=m
# CONFIG_M386 is not set
CONFIG_M486=y
# CONFIG_M586 is not set
# CONFIG_M586MMX is not set
# CONFIG_M586TSC is not set
# CONFIG_M686 is not set
# CONFIG_MACHZ_WDT is not set
CONFIG_MATH_EMULATION=y
# CONFIG_MATOM is not set
# CONFIG_MCA is not set
# CONFIG_MCORE2 is not set
# CONFIG_MCRUSOE is not set
# CONFIG_MCYRIXIII is not set
# CONFIG_MEFFICEON is not set
# CONFIG_MEMTEST is not set
CONFIG_MFD_CORE=y
CONFIG_MFD_RDC321X=y
# CONFIG_MGEODEGX1 is not set
# CONFIG_MGEODE_LX is not set
# CONFIG_MICROCODE is not set
# CONFIG_MK6 is not set
# CONFIG_MK7 is not set
# CONFIG_MK8 is not set
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MPENTIUM4 is not set
# CONFIG_MPENTIUMII is not set
# CONFIG_MPENTIUMIII is not set
# CONFIG_MPENTIUMM is not set
# CONFIG_MPSC is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_NETSC520 is not set
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_TS5500 is not set
# CONFIG_MTRR is not set
# CONFIG_MVIAC3_2 is not set
# CONFIG_MVIAC7 is not set
# CONFIG_MWINCHIP3D is not set
# CONFIG_MWINCHIPC6 is not set
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
# CONFIG_NETDEV_1000 is not set
CONFIG_NOHIGHMEM=y
CONFIG_NR_CPUS=1
# CONFIG_NSC_GPIO is not set
# CONFIG_OLPC is not set
# CONFIG_OPTIMIZE_INLINING is not set
CONFIG_OUTPUT_FORMAT="elf32-i386"
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PARAVIRT_GUEST is not set
# CONFIG_PC8736x_GPIO is not set
# CONFIG_PC87413_WDT is not set
CONFIG_PCI=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_PCI_BIOS=y
CONFIG_PCI_DIRECT=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_GOANY=y
# CONFIG_PCI_GOBIOS is not set
# CONFIG_PCI_GODIRECT is not set
# CONFIG_PCI_GOMMCONFIG is not set
# CONFIG_PCI_GOOLPC is not set
# CONFIG_PCI_QUIRKS is not set
CONFIG_PHYSICAL_ALIGN=0x100000
CONFIG_PHYSICAL_START=0x100000
CONFIG_PROCESSOR_SELECT=y
# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
CONFIG_RDC321X_WDT=m
# CONFIG_RELOCATABLE is not set
# CONFIG_RTC is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SBC7240_WDT is not set
# CONFIG_SBC8360_WDT is not set
# CONFIG_SBC_EPX_C3_WATCHDOG is not set
# CONFIG_SC1200_WDT is not set
# CONFIG_SC520_WDT is not set
# CONFIG_SCHED_HRTICK is not set
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SCx200 is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SHMEM is not set
# CONFIG_SMSC37B787_WDT is not set
# CONFIG_SMSC_SCH311X_WDT is not set
CONFIG_SPARSEMEM_STATIC=y
CONFIG_STP=m
# CONFIG_STRICT_DEVMEM is not set
# CONFIG_TELCLOCK is not set
# CONFIG_TOSHIBA is not set
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_UID16=y
CONFIG_USB_SUPPORT=y
CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_VLAN_8021Q=m
# CONFIG_VM86 is not set
# CONFIG_W83697UG_WDT is not set
# CONFIG_WAFER_WDT is not set
CONFIG_X86=y
CONFIG_X86_32=y
CONFIG_X86_32_LAZY_GS=y
# CONFIG_X86_64 is not set
CONFIG_X86_ALIGNMENT_16=y
CONFIG_X86_BSWAP=y
# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set
CONFIG_X86_CMPXCHG=y
CONFIG_X86_CPU=y
# CONFIG_X86_CPUID is not set
# CONFIG_X86_ELAN is not set
CONFIG_X86_EXTENDED_PLATFORM=y
CONFIG_X86_F00F_BUG=y
# CONFIG_X86_GENERIC is not set
CONFIG_X86_INTERNODE_CACHE_BYTES=64
CONFIG_X86_INVLPG=y
CONFIG_X86_L1_CACHE_BYTES=64
CONFIG_X86_L1_CACHE_SHIFT=4
# CONFIG_X86_MCE is not set
CONFIG_X86_MINIMUM_CPU_FAMILY=4
# CONFIG_X86_MRST is not set
# CONFIG_X86_MSR is not set
# CONFIG_X86_PAE is not set
# CONFIG_X86_PLATFORM_DEVICES is not set
CONFIG_X86_POPAD_OK=y
# CONFIG_X86_PPRO_FENCE is not set
CONFIG_X86_RDC321X=y
CONFIG_X86_REBOOTFIXUPS=y
# CONFIG_X86_RESERVE_LOW_64K is not set
# CONFIG_X86_PTDUMP is not set
# CONFIG_X86_UP_APIC is not set
# CONFIG_X86_VERBOSE_BOOTUP is not set
CONFIG_X86_WP_WORKS_OK=y
CONFIG_X86_XADD=y
# CONFIG_ZONE_DMA32 is not set

194
target/linux/rdc/patches-2.6.32/001-rdc321x_mfd_southbridge.patch
View File

@ -1,194 +0,0 @@
This patch adds a new MFD driver for the RDC321x southbridge. This southbridge
is always present in the RDC321x System-on-a-Chip and provides access to some
GPIOs as well as a watchdog. Access to these two functions is done using the
southbridge PCI device configuration space.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
Changes from v2:
- pass the pci_dev pointer to MFD cell drivers as platform_data
- remove the printk(KERN_ERR and use dev_err instead
- removed pci_dev accessors
- use DEFINE_PCI_DEVICE_TABLE
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -305,6 +305,15 @@ config EZX_PCAP
This enables the PCAP ASIC present on EZX Phones. This is
needed for MMC, TouchScreen, Sound, USB, etc..
+config MFD_RDC321X
+ tristate "Support for RDC-R321x southbridge"
+ select MFD_CORE
+ depends on PCI
+ help
+ Say yes here if you want to have support for the RDC R-321x SoC
+ southbridge which provides access to GPIOs and Watchdog using the
+ southbridge PCI device configuration space.
+
endmenu
menu "Multimedia Capabilities Port drivers"
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -50,3 +50,5 @@ obj-$(CONFIG_PCF50633_ADC) += pcf50633-a
obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
obj-$(CONFIG_AB3100_CORE) += ab3100-core.o
obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o
+
+obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o
--- /dev/null
+++ b/drivers/mfd/rdc321x-southbridge.c
@@ -0,0 +1,123 @@
+/*
+ * RDC321x MFD southbrige driver
+ *
+ * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2010 Bernhard Loos <bernhardloos@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/rdc321x.h>
+
+static struct rdc321x_wdt_pdata rdc321x_wdt_pdata;
+
+static struct resource rdc321x_wdt_resource[] = {
+ {
+ .name = "wdt-reg",
+ .start = RDC321X_WDT_CTRL,
+ .end = RDC321X_WDT_CTRL + 0x3,
+ .flags = IORESOURCE_IO,
+ }
+};
+
+static struct rdc321x_gpio_pdata rdc321x_gpio_pdata = {
+ .max_gpios = RDC321X_MAX_GPIO,
+};
+
+static struct resource rdc321x_gpio_resources[] = {
+ {
+ .name = "gpio-reg1",
+ .start = RDC321X_GPIO_CTRL_REG1,
+ .end = RDC321X_GPIO_CTRL_REG1 + 0x7,
+ .flags = IORESOURCE_IO,
+ }, {
+ .name = "gpio-reg2",
+ .start = RDC321X_GPIO_CTRL_REG2,
+ .end = RDC321X_GPIO_CTRL_REG2 + 0x7,
+ .flags = IORESOURCE_IO,
+ }
+};
+
+static struct mfd_cell rdc321x_sb_cells[] = {
+ {
+ .name = "rdc321x-wdt",
+ .resources = rdc321x_wdt_resource,
+ .num_resources = ARRAY_SIZE(rdc321x_wdt_resource),
+ .driver_data = &rdc321x_wdt_pdata,
+ }, {
+ .name = "rdc321x-gpio",
+ .resources = rdc321x_gpio_resources,
+ .num_resources = ARRAY_SIZE(rdc321x_gpio_resources),
+ .driver_data = &rdc321x_gpio_pdata,
+ },
+};
+
+static int __devinit rdc321x_sb_probe(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ int err;
+
+ err = pci_enable_device(pdev);
+ if (err) {
+ dev_err(&pdev->dev, "failed to enable device\n");
+ return err;
+ }
+
+ rdc321x_gpio_pdata.sb_pdev = pdev;
+ rdc321x_wdt_pdata.sb_pdev = pdev;
+
+ return mfd_add_devices(&pdev->dev, -1,
+ rdc321x_sb_cells, ARRAY_SIZE(rdc321x_sb_cells), NULL, 0);
+}
+
+static void __devexit rdc321x_sb_remove(struct pci_dev *pdev)
+{
+ mfd_remove_devices(&pdev->dev);
+}
+
+static DEFINE_PCI_DEVICE_TABLE(rdc321x_sb_table) = {
+ { PCI_DEVICE(PCI_VENDOR_ID_RDC, PCI_DEVICE_ID_RDC_R6030) },
+ {}
+};
+
+static struct pci_driver rdc321x_sb_driver = {
+ .name = "RDC321x Southbridge",
+ .id_table = rdc321x_sb_table,
+ .probe = rdc321x_sb_probe,
+ .remove = __devexit_p(rdc321x_sb_remove),
+};
+
+static int __init rdc321x_sb_init(void)
+{
+ return pci_register_driver(&rdc321x_sb_driver);
+}
+
+static void __exit rdc321x_sb_exit(void)
+{
+ pci_unregister_driver(&rdc321x_sb_driver);
+}
+
+module_init(rdc321x_sb_init);
+module_exit(rdc321x_sb_exit);
+
+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("RDC R-321x MFD southbridge driver");
--- /dev/null
+++ b/include/linux/mfd/rdc321x.h
@@ -0,0 +1,26 @@
+#ifndef __RDC321X_MFD_H
+#define __RDC321X_MFD_H
+
+#include <linux/types.h>
+#include <linux/pci.h>
+
+/* Offsets to be accessed in the southbridge PCI
+ * device configuration register */
+#define RDC321X_WDT_CTRL 0x44
+#define RDC321X_GPIO_CTRL_REG1 0x48
+#define RDC321X_GPIO_DATA_REG1 0x4c
+#define RDC321X_GPIO_CTRL_REG2 0x84
+#define RDC321X_GPIO_DATA_REG2 0x88
+
+#define RDC321X_MAX_GPIO 58
+
+struct rdc321x_gpio_pdata {
+ struct pci_dev *sb_pdev;
+ unsigned max_gpios;
+};
+
+struct rdc321x_wdt_pdata {
+ struct pci_dev *sb_pdev;
+};
+
+#endif /* __RDC321X_MFD_H */

282
target/linux/rdc/patches-2.6.32/002-rdc321x_gpio.patch
View File

@ -1,282 +0,0 @@
This patch adds a new GPIO driver for the RDC321x SoC GPIO controller.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
Changes from v2:
- initialize spinlock earlier
- do not declare and assign gpch variables on the same line
- use the pci_dev pointer passed as platform data
- replaced rdc321x_pci_{read,write}
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -196,6 +196,14 @@ config GPIO_LANGWELL
help
Say Y here to support Intel Moorestown platform GPIO.
+config GPIO_RDC321X
+ tristate "RDC R-321x GPIO support"
+ depends on PCI && GPIOLIB
+ select MFD_RDC321X
+ help
+ Support for the RDC R321x SoC GPIOs over southbridge
+ PCI configuration space.
+
comment "SPI GPIO expanders:"
config GPIO_MAX7301
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -19,3 +19,4 @@ obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio
obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o
+obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o
--- /dev/null
+++ b/drivers/gpio/rdc321x-gpio.c
@@ -0,0 +1,245 @@
+/*
+ * RDC321x GPIO driver
+ *
+ * Copyright (C) 2008, Volker Weiss <dev@tintuc.de>
+ * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/gpio.h>
+#include <linux/mfd/rdc321x.h>
+
+struct rdc321x_gpio {
+ spinlock_t lock;
+ struct pci_dev *sb_pdev;
+ u32 data_reg[2];
+ int reg1_ctrl_base;
+ int reg1_data_base;
+ int reg2_ctrl_base;
+ int reg2_data_base;
+ struct gpio_chip chip;
+};
+
+/* read GPIO pin */
+static int rdc_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
+{
+ struct rdc321x_gpio *gpch;
+ u32 value = 0;
+ int reg;
+
+ gpch = container_of(chip, struct rdc321x_gpio, chip);
+ reg = gpio < 32 ? gpch->reg1_data_base : gpch->reg2_data_base;
+
+ spin_lock(&gpch->lock);
+ pci_write_config_dword(gpch->sb_pdev, reg,
+ gpch->data_reg[gpio < 32 ? 0 : 1]);
+ pci_read_config_dword(gpch->sb_pdev, reg, &value);
+ spin_unlock(&gpch->lock);
+
+ return (1 << (gpio & 0x1f)) & value ? 1 : 0;
+}
+
+static void rdc_gpio_set_value_impl(struct gpio_chip *chip,
+ unsigned gpio, int value)
+{
+ struct rdc321x_gpio *gpch;
+ int reg = (gpio < 32) ? 0 : 1;
+
+ gpch = container_of(chip, struct rdc321x_gpio, chip);
+
+ if (value)
+ gpch->data_reg[reg] |= 1 << (gpio & 0x1f);
+ else
+ gpch->data_reg[reg] &= ~(1 << (gpio & 0x1f));
+
+ pci_write_config_dword(gpch->sb_pdev,
+ reg ? gpch->reg2_data_base : gpch->reg1_data_base,
+ gpch->data_reg[reg]);
+}
+
+/* set GPIO pin to value */
+static void rdc_gpio_set_value(struct gpio_chip *chip,
+ unsigned gpio, int value)
+{
+ struct rdc321x_gpio *gpch;
+
+ gpch = container_of(chip, struct rdc321x_gpio, chip);
+ spin_lock(&gpch->lock);
+ rdc_gpio_set_value_impl(chip, gpio, value);
+ spin_unlock(&gpch->lock);
+}
+
+static int rdc_gpio_config(struct gpio_chip *chip,
+ unsigned gpio, int value)
+{
+ struct rdc321x_gpio *gpch;
+ int err;
+ u32 reg;
+
+ gpch = container_of(chip, struct rdc321x_gpio, chip);
+
+ spin_lock(&gpch->lock);
+ err = pci_read_config_dword(gpch->sb_pdev, gpio < 32 ?
+ gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, &reg);
+ if (err)
+ goto unlock;
+
+ reg |= 1 << (gpio & 0x1f);
+
+ err = pci_write_config_dword(gpch->sb_pdev, gpio < 32 ?
+ gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, reg);
+ if (err)
+ goto unlock;
+
+ rdc_gpio_set_value_impl(chip, gpio, value);
+
+unlock:
+ spin_unlock(&gpch->lock);
+
+ return err;
+}
+
+/* configure GPIO pin as input */
+static int rdc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+{
+ return rdc_gpio_config(chip, gpio, 1);
+}
+
+/*
+ * Cache the initial value of both GPIO data registers
+ */
+static int __devinit rdc321x_gpio_probe(struct platform_device *pdev)
+{
+ int err;
+ struct resource *r;
+ struct rdc321x_gpio *rdc321x_gpio_dev;
+ struct rdc321x_gpio_pdata *pdata;
+
+ pdata = platform_get_drvdata(pdev);
+ if (!pdata) {
+ dev_err(&pdev->dev, "no platform data supplied\n");
+ return -ENODEV;
+ }
+
+ rdc321x_gpio_dev = kzalloc(sizeof(struct rdc321x_gpio), GFP_KERNEL);
+ if (!rdc321x_gpio_dev) {
+ dev_err(&pdev->dev, "failed to allocate private data\n");
+ return -ENOMEM;
+ }
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg1");
+ if (!r) {
+ dev_err(&pdev->dev, "failed to get gpio-reg1 resource\n");
+ err = -ENODEV;
+ goto out_free;
+ }
+
+ spin_lock_init(&rdc321x_gpio_dev->lock);
+ rdc321x_gpio_dev->sb_pdev = pdata->sb_pdev;
+ rdc321x_gpio_dev->reg1_ctrl_base = r->start;
+ rdc321x_gpio_dev->reg1_data_base = r->start + 0x4;
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg2");
+ if (!r) {
+ dev_err(&pdev->dev, "failed to get gpio-reg2 resource\n");
+ err = -ENODEV;
+ goto out_free;
+ }
+
+ rdc321x_gpio_dev->reg2_ctrl_base = r->start;
+ rdc321x_gpio_dev->reg2_data_base = r->start + 0x4;
+
+ rdc321x_gpio_dev->chip.label = "rdc321x-gpio";
+ rdc321x_gpio_dev->chip.direction_input = rdc_gpio_direction_input;
+ rdc321x_gpio_dev->chip.direction_output = rdc_gpio_config;
+ rdc321x_gpio_dev->chip.get = rdc_gpio_get_value;
+ rdc321x_gpio_dev->chip.set = rdc_gpio_set_value;
+ rdc321x_gpio_dev->chip.base = 0;
+ rdc321x_gpio_dev->chip.ngpio = pdata->max_gpios;
+
+ platform_set_drvdata(pdev, rdc321x_gpio_dev);
+
+ /* This might not be, what others (BIOS, bootloader, etc.)
+ wrote to these registers before, but it's a good guess. Still
+ better than just using 0xffffffff. */
+ err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
+ rdc321x_gpio_dev->reg1_data_base,
+ &rdc321x_gpio_dev->data_reg[0]);
+ if (err)
+ goto out_drvdata;
+
+ err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
+ rdc321x_gpio_dev->reg2_data_base,
+ &rdc321x_gpio_dev->data_reg[1]);
+ if (err)
+ goto out_drvdata;
+
+ dev_info(&pdev->dev, "registering %d GPIOs\n",
+ rdc321x_gpio_dev->chip.ngpio);
+ return gpiochip_add(&rdc321x_gpio_dev->chip);
+
+out_drvdata:
+ platform_set_drvdata(pdev, NULL);
+out_free:
+ kfree(rdc321x_gpio_dev);
+ return err;
+}
+
+static int __devexit rdc321x_gpio_remove(struct platform_device *pdev)
+{
+ int ret;
+ struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev);
+
+ ret = gpiochip_remove(&rdc321x_gpio_dev->chip);
+ if (ret)
+ dev_err(&pdev->dev, "failed to unregister chip\n");
+
+ kfree(rdc321x_gpio_dev);
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+}
+
+static struct platform_driver rdc321x_gpio_driver = {
+ .driver.name = "rdc321x-gpio",
+ .driver.owner = THIS_MODULE,
+ .probe = rdc321x_gpio_probe,
+ .remove = __devexit_p(rdc321x_gpio_remove),
+};
+
+static int __init rdc321x_gpio_init(void)
+{
+ return platform_driver_register(&rdc321x_gpio_driver);
+}
+
+static void __exit rdc321x_gpio_exit(void)
+{
+ platform_driver_unregister(&rdc321x_gpio_driver);
+}
+
+module_init(rdc321x_gpio_init);
+module_exit(rdc321x_gpio_exit);
+
+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
+MODULE_DESCRIPTION("RDC321x GPIO driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:rdc321x-gpio");

148
target/linux/rdc/patches-2.6.32/003-rdc321x_watchdog_southbridge.patch
View File

@ -1,148 +0,0 @@
The RDC321x MFD southbridge driver will pass a reference to the southbridge
PCI device which should be used by the watchdog driver for its operations.
This patch converts the watchdog driver to use the pci_dev pointer and make use
of the base register resource which is passed along with the platform device.
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
Changes from v2:
- replaced rdc321x_pci_{read,write}
- use the pci_dev pointer passed as platform_data
--- a/drivers/watchdog/rdc321x_wdt.c
+++ b/drivers/watchdog/rdc321x_wdt.c
@@ -1,7 +1,7 @@
/*
* RDC321x watchdog driver
*
- * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
*
* This driver is highly inspired from the cpu5_wdt driver
*
@@ -36,8 +36,7 @@
#include <linux/watchdog.h>
#include <linux/io.h>
#include <linux/uaccess.h>
-
-#include <asm/rdc321x_defs.h>
+#include <linux/mfd/rdc321x.h>
#define RDC_WDT_MASK 0x80000000 /* Mask */
#define RDC_WDT_EN 0x00800000 /* Enable bit */
@@ -63,6 +62,8 @@ static struct {
int default_ticks;
unsigned long inuse;
spinlock_t lock;
+ struct pci_dev *sb_pdev;
+ int base_reg;
} rdc321x_wdt_device;
/* generic helper functions */
@@ -70,14 +71,18 @@ static struct {
static void rdc321x_wdt_trigger(unsigned long unused)
{
unsigned long flags;
+ u32 val;
if (rdc321x_wdt_device.running)
ticks--;
/* keep watchdog alive */
spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
- outl(RDC_WDT_EN | inl(RDC3210_CFGREG_DATA),
- RDC3210_CFGREG_DATA);
+ pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg, &val);
+ val |= RDC_WDT_EN;
+ pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg, val);
spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
/* requeue?? */
@@ -105,10 +110,13 @@ static void rdc321x_wdt_start(void)
/* Clear the timer */
spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
- outl(RDC_CLS_TMR, RDC3210_CFGREG_ADDR);
+ pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg, RDC_CLS_TMR);
/* Enable watchdog and set the timeout to 81.92 us */
- outl(RDC_WDT_EN | RDC_WDT_CNT, RDC3210_CFGREG_DATA);
+ pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg,
+ RDC_WDT_EN | RDC_WDT_CNT);
spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
mod_timer(&rdc321x_wdt_device.timer,
@@ -148,7 +156,7 @@ static long rdc321x_wdt_ioctl(struct fil
unsigned long arg)
{
void __user *argp = (void __user *)arg;
- unsigned int value;
+ u32 value;
static struct watchdog_info ident = {
.options = WDIOF_CARDRESET,
.identity = "RDC321x WDT",
@@ -162,9 +170,10 @@ static long rdc321x_wdt_ioctl(struct fil
case WDIOC_GETSTATUS:
/* Read the value from the DATA register */
spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
- value = inl(RDC3210_CFGREG_DATA);
+ pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg, &value);
spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
- if (copy_to_user(argp, &value, sizeof(int)))
+ if (copy_to_user(argp, &value, sizeof(u32)))
return -EFAULT;
break;
case WDIOC_GETSUPPORT:
@@ -219,17 +228,35 @@ static struct miscdevice rdc321x_wdt_mis
static int __devinit rdc321x_wdt_probe(struct platform_device *pdev)
{
int err;
+ struct resource *r;
+ struct rdc321x_wdt_pdata *pdata;
+
+ pdata = platform_get_drvdata(pdev);
+ if (!pdata) {
+ dev_err(&pdev->dev, "no platform data supplied\n");
+ return -ENODEV;
+ }
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_IO, "wdt-reg");
+ if (!r) {
+ dev_err(&pdev->dev, "failed to get wdt-reg resource\n");
+ return -ENODEV;
+ }
+
+ rdc321x_wdt_device.sb_pdev = pdata->sb_pdev;
+ rdc321x_wdt_device.base_reg = r->start;
err = misc_register(&rdc321x_wdt_misc);
if (err < 0) {
- printk(KERN_ERR PFX "watchdog misc_register failed\n");
+ dev_err(&pdev->dev, "misc_register failed\n");
return err;
}
spin_lock_init(&rdc321x_wdt_device.lock);
/* Reset the watchdog */
- outl(RDC_WDT_RST, RDC3210_CFGREG_DATA);
+ pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg, RDC_WDT_RST);
init_completion(&rdc321x_wdt_device.stop);
rdc321x_wdt_device.queue = 0;
@@ -240,7 +267,7 @@ static int __devinit rdc321x_wdt_probe(s
rdc321x_wdt_device.default_ticks = ticks;
- printk(KERN_INFO PFX "watchdog init success\n");
+ dev_info(&pdev->dev, "watchdog init success\n");
return 0;
}

20
target/linux/rdc/patches-2.6.32/004-rdc321x_defs_remove.patch
View File

@ -1,20 +0,0 @@
This file is replaced by a cleaner version with the adding of a MFD driver for
the southbridge.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
--- a/arch/x86/include/asm/rdc321x_defs.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#define PFX "rdc321x: "
-
-/* General purpose configuration and data registers */
-#define RDC3210_CFGREG_ADDR 0x0CF8
-#define RDC3210_CFGREG_DATA 0x0CFC
-
-#define RDC321X_GPIO_CTRL_REG1 0x48
-#define RDC321X_GPIO_CTRL_REG2 0x84
-#define RDC321X_GPIO_DATA_REG1 0x4c
-#define RDC321X_GPIO_DATA_REG2 0x88
-
-#define RDC321X_MAX_GPIO 58

20
target/linux/rdc/patches-2.6.32/006-yenta_mistery.patch
View File

@ -1,20 +0,0 @@
--- a/drivers/pcmcia/yenta_socket.c
+++ b/drivers/pcmcia/yenta_socket.c
@@ -1174,6 +1174,17 @@ static int __devinit yenta_probe (struct
/* We must finish initialization here */
+#ifdef CONFIG_X86_RDC321X
+/* #define YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK 0x0044f044 */
+#define YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK 0x0844b060
+/* #define YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK 0x0044d044 */
+
+ config_writel(socket, 32*4, YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK);
+ config_writel(socket, 35*4, 0x00000022);
+ config_writel(socket, 36*4, 0x60200000);
+ config_writel(socket, 40*4, 0x7e020000);
+#endif
+
if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
/* No IRQ or request_irq failed. Poll */
socket->cb_irq = 0; /* But zero is a valid IRQ number. */

11
target/linux/rdc/patches-2.6.32/009-rdc321x_select_embedded.patch
View File

@ -1,11 +0,0 @@
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -405,6 +405,8 @@ config X86_RDC321X
depends on X86_EXTENDED_PLATFORM
select M486
select X86_REBOOTFIXUPS
+ select EMBEDDED
+ select ARCH_REQUIRE_GPIOLIB
---help---
This option is needed for RDC R-321x system-on-chip, also known
as R-8610-(G).

176
target/linux/rdc/patches-2.6.32/010-rdc_cpu_ident.patch
View File

@ -1,176 +0,0 @@
--- /dev/null
+++ b/Documentation/x86/rdc.txt
@@ -0,0 +1,69 @@
+
+Introduction
+============
+
+RDC (http://www.rdc.com.tw) have been manufacturing x86-compatible SoC
+(system-on-chips) for a number of years. They are not the fastest of
+CPUs (clock speeds ranging from 133-150MHz) but 486SX compatibility
+coupled with very low power consumption[1] and low cost make them ideal
+for embedded applications.
+
+
+Where to find
+=============
+
+RDC chips show up in numerous embedded devices, but be careful since
+many of them will not run Linux 2.6 without significant expertise.
+
+There are several variants of what the linux kernel refers to generically
+as RDC321X: R8610, R321x, S3282 and AMRISC20000.
+
+R321x: Found in various routers, see the OpenWrt project for details,
+ http://wiki.openwrt.org/oldwiki/rdcport
+
+R8610: Found on the RDC evaluation board
+ http://www.ivankuten.com/system-on-chip-soc/rdc-r8610/
+
+AMRISC20000: Found in the MGB-100 wireless hard disk
+ http://tintuc.no-ip.com/linux/tipps/mgb100/
+
+S3282: Found in various NAS devices, including the Bifferboard
+ http://www.bifferos.com
+
+
+Kernel Configuration
+====================
+
+Add support for this CPU with CONFIG_X86_RDC321X. Ensure that maths
+emulation is included (CONFIG_MATH_EMULATION selected) and avoid MCE
+(CONFIG_X86_MCE not selected).
+
+
+CPU detection
+=============
+
+None of these chips support the cpuid instruction, so as with some
+other x86 compatible SoCs, we must check the north bridge and look
+for specific 'signature' PCI device config.
+
+The current detection code has been tested only on the Bifferboard
+(S3282 CPU), please send bug reports or success stories with
+other devices to bifferos@yahoo.co.uk.
+
+
+Credits
+=======
+
+Many thanks to RDC for providing the customer codes to allow
+detection of all known variants, without which this detection code
+would have been very hard to ascertain.
+
+
+References
+==========
+
+[1] S3282 in certain NAS solutions consumes less than 1W
+
+
+mark@bifferos.com 2009
+
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -403,6 +403,7 @@ config X86_RDC321X
bool "RDC R-321x SoC"
depends on X86_32
depends on X86_EXTENDED_PLATFORM
+ select PCI
select M486
select X86_REBOOTFIXUPS
select EMBEDDED
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -122,7 +122,8 @@ struct cpuinfo_x86 {
#define X86_VENDOR_CENTAUR 5
#define X86_VENDOR_TRANSMETA 7
#define X86_VENDOR_NSC 8
-#define X86_VENDOR_NUM 9
+#define X86_VENDOR_RDC 9
+#define X86_VENDOR_NUM 10
#define X86_VENDOR_UNKNOWN 0xff
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_CPU_SUP_CYRIX_32) += cyrix
obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o
obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
+obj-$(CONFIG_X86_RDC321X) += rdc.o
obj-$(CONFIG_PERF_EVENTS) += perf_event.o
--- /dev/null
+++ b/arch/x86/kernel/cpu/rdc.c
@@ -0,0 +1,69 @@
+/*
+ * See Documentation/x86/rdc.txt
+ *
+ * mark@bifferos.com
+ */
+
+#include <linux/pci.h>
+#include <asm/pci-direct.h>
+#include "cpu.h"
+
+
+static void __cpuinit rdc_identify(struct cpuinfo_x86 *c)
+{
+ u16 vendor, device;
+ u32 customer_id;
+
+ if (!early_pci_allowed())
+ return;
+
+ /* RDC CPU is SoC (system-on-chip), Northbridge is always present */
+ vendor = read_pci_config_16(0, 0, 0, PCI_VENDOR_ID);
+ device = read_pci_config_16(0, 0, 0, PCI_DEVICE_ID);
+
+ if (vendor != PCI_VENDOR_ID_RDC || device != PCI_DEVICE_ID_RDC_R6020)
+ return; /* not RDC */
+ /*
+ * NB: We could go on and check other devices, e.g. r6040 NIC, but
+ * that's probably overkill
+ */
+
+ customer_id = read_pci_config(0, 0, 0, 0x90);
+
+ switch (customer_id) {
+ /* id names are from RDC */
+ case 0x00321000:
+ strcpy(c->x86_model_id, "R3210/R3211");
+ break;
+ case 0x00321001:
+ strcpy(c->x86_model_id, "AMITRISC20000/20010");
+ break;
+ case 0x00321002:
+ strcpy(c->x86_model_id, "R3210X/Edimax");
+ break;
+ case 0x00321003:
+ strcpy(c->x86_model_id, "R3210/Kcodes");
+ break;
+ case 0x00321004: /* tested */
+ strcpy(c->x86_model_id, "S3282/CodeTek");
+ break;
+ case 0x00321007:
+ strcpy(c->x86_model_id, "R8610");
+ break;
+ default:
+ pr_info("RDC CPU: Unrecognised Customer ID (0x%x) please report to linux-kernel@vger.kernel.org\n", customer_id);
+ break;
+ }
+
+ strcpy(c->x86_vendor_id, "RDC");
+ c->x86_vendor = X86_VENDOR_RDC;
+}
+
+static const struct cpu_dev __cpuinitconst rdc_cpu_dev = {
+ .c_vendor = "RDC",
+ .c_ident = { "RDC" },
+ .c_identify = rdc_identify,
+ .c_x86_vendor = X86_VENDOR_RDC,
+};
+
+cpu_dev_register(rdc_cpu_dev);

22
target/linux/rdc/patches-2.6.32/011-tune_lzma_options.patch
View File

@ -1,22 +0,0 @@
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -228,7 +228,7 @@ cmd_bzip2 = (cat $(filter-out FORCE,$^)
quiet_cmd_lzma = LZMA $@
cmd_lzma = (cat $(filter-out FORCE,$^) | \
- lzma e -d20 -lc1 -lp2 -pb2 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
+ lzma e -lc8 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
(rm -f $@ ; false)
quiet_cmd_lzo = LZO $@
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -28,7 +28,7 @@
#error "Invalid value for CONFIG_PHYSICAL_ALIGN"
#endif
-#ifdef CONFIG_KERNEL_BZIP2
+#if defined(CONFIG_KERNEL_BZIP2) || defined(CONFIG_KERNEL_LZMA)
#define BOOT_HEAP_SIZE 0x400000
#else /* !CONFIG_KERNEL_BZIP2 */

24
target/linux/rdc/patches-2.6.32/012-export_erase_write.patch
View File

@ -1,24 +0,0 @@
--- a/drivers/mtd/mtdblock.c
+++ b/drivers/mtd/mtdblock.c
@@ -47,7 +47,7 @@ static void erase_callback(struct erase_
wake_up(wait_q);
}
-static int erase_write (struct mtd_info *mtd, unsigned long pos,
+int erase_write (struct mtd_info *mtd, unsigned long pos,
int len, const char *buf)
{
struct erase_info erase;
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -319,6 +319,10 @@ int default_mtd_writev(struct mtd_info *
int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs,
unsigned long count, loff_t from, size_t *retlen);
+int erase_write (struct mtd_info *mtd, unsigned long pos,
+ int len, const char *buf);
+
+
#ifdef CONFIG_MTD_PARTITIONS
void mtd_erase_callback(struct erase_info *instr);
#else

31
target/linux/rdc/patches-2.6.32/013-r6040_fix_mii_check_media.patch
View File

@ -1,31 +0,0 @@
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -401,9 +401,6 @@ static void r6040_init_mac_regs(struct n
* we may got called by r6040_tx_timeout which has left
* some unsent tx buffers */
iowrite16(0x01, ioaddr + MTPR);
-
- /* Check media */
- mii_check_media(&lp->mii_if, 1, 1);
}
static void r6040_tx_timeout(struct net_device *dev)
@@ -531,8 +528,6 @@ static int r6040_phy_mode_chk(struct net
phy_dat = 0x0000;
}
- mii_check_media(&lp->mii_if, 0, 1);
-
return phy_dat;
};
@@ -814,6 +809,9 @@ static void r6040_timer(unsigned long da
/* Timer active again */
mod_timer(&lp->timer, round_jiffies(jiffies + HZ));
+
+ /* Check media */
+ mii_check_media(&lp->mii_if, 1, 1);
}
/* Read/set MAC address routines */

466
target/linux/rdc/patches-2.6.32/014-r6040_phylib_support.patch
View File

@ -1,466 +0,0 @@
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -45,6 +45,7 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/uaccess.h>
+#include <linux/phy.h>
#include <asm/processor.h>
@@ -180,7 +181,6 @@ struct r6040_descriptor {
struct r6040_private {
spinlock_t lock; /* driver lock */
- struct timer_list timer;
struct pci_dev *pdev;
struct r6040_descriptor *rx_insert_ptr;
struct r6040_descriptor *rx_remove_ptr;
@@ -190,13 +190,15 @@ struct r6040_private {
struct r6040_descriptor *tx_ring;
dma_addr_t rx_ring_dma;
dma_addr_t tx_ring_dma;
- u16 tx_free_desc, phy_addr, phy_mode;
+ u16 tx_free_desc, phy_addr;
u16 mcr0, mcr1;
- u16 switch_sig;
struct net_device *dev;
- struct mii_if_info mii_if;
+ struct mii_bus *mii_bus;
struct napi_struct napi;
void __iomem *base;
+ struct phy_device *phydev;
+ int old_link;
+ int old_duplex;
};
static char version[] __devinitdata = KERN_INFO DRV_NAME
@@ -239,20 +241,29 @@ static void r6040_phy_write(void __iomem
}
}
-static int r6040_mdio_read(struct net_device *dev, int mii_id, int reg)
+static int r6040_mdiobus_read(struct mii_bus *bus, int phy_addr, int reg)
{
+ struct net_device *dev = bus->priv;
struct r6040_private *lp = netdev_priv(dev);
void __iomem *ioaddr = lp->base;
- return (r6040_phy_read(ioaddr, lp->phy_addr, reg));
+ return r6040_phy_read(ioaddr, phy_addr, reg);
}
-static void r6040_mdio_write(struct net_device *dev, int mii_id, int reg, int val)
+static int r6040_mdiobus_write(struct mii_bus *bus, int phy_addr, int reg, u16 value)
{
+ struct net_device *dev = bus->priv;
struct r6040_private *lp = netdev_priv(dev);
void __iomem *ioaddr = lp->base;
- r6040_phy_write(ioaddr, lp->phy_addr, reg, val);
+ r6040_phy_write(ioaddr, phy_addr, reg, value);
+
+ return 0;
+}
+
+static int r6040_mdiobus_reset(struct mii_bus *bus)
+{
+ return 0;
}
static void r6040_free_txbufs(struct net_device *dev)
@@ -409,10 +420,9 @@ static void r6040_tx_timeout(struct net_
void __iomem *ioaddr = priv->base;
printk(KERN_WARNING "%s: transmit timed out, int enable %4.4x "
- "status %4.4x, PHY status %4.4x\n",
+ "status %4.4x\n",
dev->name, ioread16(ioaddr + MIER),
- ioread16(ioaddr + MISR),
- r6040_mdio_read(dev, priv->mii_if.phy_id, MII_BMSR));
+ ioread16(ioaddr + MISR));
dev->stats.tx_errors++;
@@ -464,9 +474,6 @@ static int r6040_close(struct net_device
struct r6040_private *lp = netdev_priv(dev);
struct pci_dev *pdev = lp->pdev;
- /* deleted timer */
- del_timer_sync(&lp->timer);
-
spin_lock_irq(&lp->lock);
napi_disable(&lp->napi);
netif_stop_queue(dev);
@@ -496,64 +503,14 @@ static int r6040_close(struct net_device
return 0;
}
-/* Status of PHY CHIP */
-static int r6040_phy_mode_chk(struct net_device *dev)
-{
- struct r6040_private *lp = netdev_priv(dev);
- void __iomem *ioaddr = lp->base;
- int phy_dat;
-
- /* PHY Link Status Check */
- phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 1);
- if (!(phy_dat & 0x4))
- phy_dat = 0x8000; /* Link Failed, full duplex */
-
- /* PHY Chip Auto-Negotiation Status */
- phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 1);
- if (phy_dat & 0x0020) {
- /* Auto Negotiation Mode */
- phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 5);
- phy_dat &= r6040_phy_read(ioaddr, lp->phy_addr, 4);
- if (phy_dat & 0x140)
- /* Force full duplex */
- phy_dat = 0x8000;
- else
- phy_dat = 0;
- } else {
- /* Force Mode */
- phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 0);
- if (phy_dat & 0x100)
- phy_dat = 0x8000;
- else
- phy_dat = 0x0000;
- }
-
- return phy_dat;
-};
-
-static void r6040_set_carrier(struct mii_if_info *mii)
-{
- if (r6040_phy_mode_chk(mii->dev)) {
- /* autoneg is off: Link is always assumed to be up */
- if (!netif_carrier_ok(mii->dev))
- netif_carrier_on(mii->dev);
- } else
- r6040_phy_mode_chk(mii->dev);
-}
-
static int r6040_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
struct r6040_private *lp = netdev_priv(dev);
- struct mii_ioctl_data *data = if_mii(rq);
- int rc;
- if (!netif_running(dev))
+ if (!lp->phydev)
return -EINVAL;
- spin_lock_irq(&lp->lock);
- rc = generic_mii_ioctl(&lp->mii_if, data, cmd, NULL);
- spin_unlock_irq(&lp->lock);
- r6040_set_carrier(&lp->mii_if);
- return rc;
+
+ return phy_mii_ioctl(lp->phydev, if_mii(rq), cmd);
}
static int r6040_rx(struct net_device *dev, int limit)
@@ -752,26 +709,6 @@ static int r6040_up(struct net_device *d
if (ret)
return ret;
- /* Read the PHY ID */
- lp->switch_sig = r6040_phy_read(ioaddr, 0, 2);
-
- if (lp->switch_sig == ICPLUS_PHY_ID) {
- r6040_phy_write(ioaddr, 29, 31, 0x175C); /* Enable registers */
- lp->phy_mode = 0x8000;
- } else {
- /* PHY Mode Check */
- r6040_phy_write(ioaddr, lp->phy_addr, 4, PHY_CAP);
- r6040_phy_write(ioaddr, lp->phy_addr, 0, PHY_MODE);
-
- if (PHY_MODE == 0x3100)
- lp->phy_mode = r6040_phy_mode_chk(dev);
- else
- lp->phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
- }
-
- /* Set duplex mode */
- lp->mcr0 |= lp->phy_mode;
-
/* improve performance (by RDC guys) */
r6040_phy_write(ioaddr, 30, 17, (r6040_phy_read(ioaddr, 30, 17) | 0x4000));
r6040_phy_write(ioaddr, 30, 17, ~((~r6040_phy_read(ioaddr, 30, 17)) | 0x2000));
@@ -784,35 +721,6 @@ static int r6040_up(struct net_device *d
return 0;
}
-/*
- A periodic timer routine
- Polling PHY Chip Link Status
-*/
-static void r6040_timer(unsigned long data)
-{
- struct net_device *dev = (struct net_device *)data;
- struct r6040_private *lp = netdev_priv(dev);
- void __iomem *ioaddr = lp->base;
- u16 phy_mode;
-
- /* Polling PHY Chip Status */
- if (PHY_MODE == 0x3100)
- phy_mode = r6040_phy_mode_chk(dev);
- else
- phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
-
- if (phy_mode != lp->phy_mode) {
- lp->phy_mode = phy_mode;
- lp->mcr0 = (lp->mcr0 & 0x7fff) | phy_mode;
- iowrite16(lp->mcr0, ioaddr);
- }
-
- /* Timer active again */
- mod_timer(&lp->timer, round_jiffies(jiffies + HZ));
-
- /* Check media */
- mii_check_media(&lp->mii_if, 1, 1);
-}
/* Read/set MAC address routines */
static void r6040_mac_address(struct net_device *dev)
@@ -874,10 +782,6 @@ static int r6040_open(struct net_device
napi_enable(&lp->napi);
netif_start_queue(dev);
- /* set and active a timer process */
- setup_timer(&lp->timer, r6040_timer, (unsigned long) dev);
- if (lp->switch_sig != ICPLUS_PHY_ID)
- mod_timer(&lp->timer, jiffies + HZ);
return 0;
}
@@ -1018,40 +922,22 @@ static void netdev_get_drvinfo(struct ne
static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
struct r6040_private *rp = netdev_priv(dev);
- int rc;
-
- spin_lock_irq(&rp->lock);
- rc = mii_ethtool_gset(&rp->mii_if, cmd);
- spin_unlock_irq(&rp->lock);
- return rc;
+ return phy_ethtool_gset(rp->phydev, cmd);
}
static int netdev_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
struct r6040_private *rp = netdev_priv(dev);
- int rc;
-
- spin_lock_irq(&rp->lock);
- rc = mii_ethtool_sset(&rp->mii_if, cmd);
- spin_unlock_irq(&rp->lock);
- r6040_set_carrier(&rp->mii_if);
-
- return rc;
-}
-
-static u32 netdev_get_link(struct net_device *dev)
-{
- struct r6040_private *rp = netdev_priv(dev);
- return mii_link_ok(&rp->mii_if);
+ return phy_ethtool_sset(rp->phydev, cmd);
}
static const struct ethtool_ops netdev_ethtool_ops = {
.get_drvinfo = netdev_get_drvinfo,
.get_settings = netdev_get_settings,
.set_settings = netdev_set_settings,
- .get_link = netdev_get_link,
+ .get_link = ethtool_op_get_link,
};
static const struct net_device_ops r6040_netdev_ops = {
@@ -1070,6 +956,86 @@ static const struct net_device_ops r6040
#endif
};
+static void r6040_adjust_link(struct net_device *dev)
+{
+ struct r6040_private *lp = netdev_priv(dev);
+ struct phy_device *phydev = lp->phydev;
+ int status_changed = 0;
+ void __iomem *ioaddr = lp->base;
+
+ BUG_ON (!phydev);
+
+ if (lp->old_link != phydev->link) {
+ status_changed = 1;
+ lp->old_link = phydev->link;
+ }
+
+ /* reflect duplex change */
+ if (phydev->link && (lp->old_duplex != phydev->duplex)) {
+ lp->mcr0 |= (phydev->duplex == DUPLEX_FULL ? 0x8000 : 0);
+ iowrite16(lp->mcr0, ioaddr);
+
+ status_changed = 1;
+ lp->old_duplex = phydev->duplex;
+ }
+
+ if (status_changed) {
+ pr_info("%s: link %s", dev->name, phydev->link ?
+ "UP" : "DOWN");
+ if (phydev->link)
+ pr_cont(" - %d/%s", phydev->speed,
+ DUPLEX_FULL == phydev->duplex ? "full" : "half");
+ pr_cont("\n");
+ }
+}
+
+static int r6040_mii_probe(struct net_device *dev)
+{
+ struct r6040_private *lp = netdev_priv(dev);
+ struct phy_device *phydev = NULL;
+ int phy_addr;
+
+ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
+ if (lp->mii_bus->phy_map[phy_addr]) {
+ phydev = lp->mii_bus->phy_map[phy_addr];
+ break;
+ }
+ }
+
+ if (!phydev) {
+ printk(KERN_ERR DRV_NAME "no PHY found\n");
+ return -ENODEV;
+ }
+
+ phydev = phy_connect(dev, dev_name(&phydev->dev), &r6040_adjust_link,
+ 0, PHY_INTERFACE_MODE_MII);
+
+ if (IS_ERR(phydev)) {
+ printk(KERN_ERR DRV_NAME "could not attach to PHY\n");
+ return PTR_ERR(phydev);
+ }
+
+ /* mask with MAC supported features */
+ phydev->supported &= (SUPPORTED_10baseT_Half
+ | SUPPORTED_10baseT_Full
+ | SUPPORTED_100baseT_Half
+ | SUPPORTED_100baseT_Full
+ | SUPPORTED_Autoneg
+ | SUPPORTED_MII
+ | SUPPORTED_TP);
+
+ phydev->advertising = phydev->supported;
+ lp->phydev = phydev;
+ lp->old_link = 0;
+ lp->old_duplex = -1;
+
+ printk(KERN_INFO "%s: attached PHY driver [%s] "
+ "(mii_bus:phy_addr=%s)\n", dev->name,
+ phydev->drv->name, dev_name(&phydev->dev));
+
+ return 0;
+}
+
static int __devinit r6040_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
@@ -1080,6 +1046,7 @@ static int __devinit r6040_init_one(stru
static int card_idx = -1;
int bar = 0;
u16 *adrp;
+ int i;
printk("%s\n", version);
@@ -1167,7 +1134,6 @@ static int __devinit r6040_init_one(stru
/* Init RDC private data */
lp->mcr0 = 0x1002;
lp->phy_addr = phy_table[card_idx];
- lp->switch_sig = 0;
/* The RDC-specific entries in the device structure. */
dev->netdev_ops = &r6040_netdev_ops;
@@ -1175,28 +1141,61 @@ static int __devinit r6040_init_one(stru
dev->watchdog_timeo = TX_TIMEOUT;
netif_napi_add(dev, &lp->napi, r6040_poll, 64);
- lp->mii_if.dev = dev;
- lp->mii_if.mdio_read = r6040_mdio_read;
- lp->mii_if.mdio_write = r6040_mdio_write;
- lp->mii_if.phy_id = lp->phy_addr;
- lp->mii_if.phy_id_mask = 0x1f;
- lp->mii_if.reg_num_mask = 0x1f;
+
+ lp->mii_bus = mdiobus_alloc();
+ if (!lp->mii_bus) {
+ printk(KERN_ERR DRV_NAME ": mdiobus_alloc failed\n");
+ goto err_out_unmap;
+ }
+
+ lp->mii_bus->priv = dev;
+ lp->mii_bus->read = r6040_mdiobus_read;
+ lp->mii_bus->write = r6040_mdiobus_write;
+ lp->mii_bus->reset = r6040_mdiobus_reset;
+ lp->mii_bus->name = "r6040_eth_mii";
+ snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "%x", card_idx);
+ lp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
+ if (!lp->mii_bus->irq) {
+ printk(KERN_ERR DRV_NAME ": allocation failed\n");
+ goto err_out_mdio;
+ }
+
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ lp->mii_bus->irq[i] = PHY_POLL;
+
+ err = mdiobus_register(lp->mii_bus);
+ if (err) {
+ printk(KERN_ERR DRV_NAME ": failed to register MII bus\n");
+ goto err_out_mdio_irq;
+ }
+
+ err = r6040_mii_probe(dev);
+ if (err) {
+ printk(KERN_ERR DRV_NAME ": failed to probe MII bus\n");
+ goto err_out_mdio_unregister;
+ }
/* Check the vendor ID on the PHY, if 0xffff assume none attached */
if (r6040_phy_read(ioaddr, lp->phy_addr, 2) == 0xffff) {
printk(KERN_ERR DRV_NAME ": Failed to detect an attached PHY\n");
err = -ENODEV;
- goto err_out_unmap;
+ goto err_out_mdio_unregister;
}
/* Register net device. After this dev->name assign */
err = register_netdev(dev);
if (err) {
printk(KERN_ERR DRV_NAME ": Failed to register net device\n");
- goto err_out_unmap;
+ goto err_out_mdio_unregister;
}
return 0;
+err_out_mdio_unregister:
+ mdiobus_unregister(lp->mii_bus);
+err_out_mdio_irq:
+ kfree(lp->mii_bus->irq);
+err_out_mdio:
+ mdiobus_free(lp->mii_bus);
err_out_unmap:
pci_iounmap(pdev, ioaddr);
err_out_free_res:
@@ -1210,8 +1209,12 @@ err_out:
static void __devexit r6040_remove_one(struct pci_dev *pdev)
{
struct net_device *dev = pci_get_drvdata(pdev);
+ struct r6040_private *lp = netdev_priv(dev);
unregister_netdev(dev);
+ mdiobus_unregister(lp->mii_bus);
+ kfree(lp->mii_bus->irq);
+ mdiobus_free(lp->mii_bus);
pci_release_regions(pdev);
free_netdev(dev);
pci_disable_device(pdev);

151
target/linux/rdc/patches-2.6.32/015-r6040_fix_multicast.patch
View File

@ -1,151 +0,0 @@
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -70,6 +70,8 @@
/* MAC registers */
#define MCR0 0x00 /* Control register 0 */
+#define PROMISC 0x0020 /* Promiscuous mode */
+#define HASH_EN 0x0100 /* Enable multicast hash table function */
#define MCR1 0x04 /* Control register 1 */
#define MAC_RST 0x0001 /* Reset the MAC */
#define MBCR 0x08 /* Bus control */
@@ -837,76 +839,96 @@ static void r6040_multicast_list(struct
{
struct r6040_private *lp = netdev_priv(dev);
void __iomem *ioaddr = lp->base;
- u16 *adrp;
- u16 reg;
unsigned long flags;
struct dev_mc_list *dmi = dev->mc_list;
int i;
+ u16 *adrp;
+ u16 hash_table[4] = { 0 };
+
+ spin_lock_irqsave(&lp->lock, flags);
- /* MAC Address */
+ /* Keep our MAC Address */
adrp = (u16 *)dev->dev_addr;
iowrite16(adrp[0], ioaddr + MID_0L);
iowrite16(adrp[1], ioaddr + MID_0M);
iowrite16(adrp[2], ioaddr + MID_0H);
- /* Promiscous Mode */
- spin_lock_irqsave(&lp->lock, flags);
-
/* Clear AMCP & PROM bits */
- reg = ioread16(ioaddr) & ~0x0120;
+ lp->mcr0 = ioread16(ioaddr + MCR0) & ~(PROMISC | HASH_EN);
+
+ /* Promiscuous mode */
if (dev->flags & IFF_PROMISC) {
- reg |= 0x0020;
- lp->mcr0 |= 0x0020;
+ lp->mcr0 |= PROMISC;
}
- /* Too many multicast addresses
- * accept all traffic */
- else if ((dev->mc_count > MCAST_MAX)
- || (dev->flags & IFF_ALLMULTI))
- reg |= 0x0020;
- iowrite16(reg, ioaddr);
- spin_unlock_irqrestore(&lp->lock, flags);
-
- /* Build the hash table */
- if (dev->mc_count > MCAST_MAX) {
- u16 hash_table[4];
- u32 crc;
+ /* Enable multicast hash table function to
+ * receive all multicast packets. */
+ else if (dev->flags & IFF_ALLMULTI) {
+ lp->mcr0 |= HASH_EN;
+
+ for (i = 0; i < MCAST_MAX ; i++) {
+ iowrite16(0, ioaddr + MID_1L + 8 * i);
+ iowrite16(0, ioaddr + MID_1M + 8 * i);
+ iowrite16(0, ioaddr + MID_1H + 8 * i);
+ }
for (i = 0; i < 4; i++)
- hash_table[i] = 0;
+ hash_table[i] = 0xffff;
+ }
- for (i = 0; i < dev->mc_count; i++) {
- char *addrs = dmi->dmi_addr;
+ /* Use internal multicast address registers if the number of
+ * multicast addresses is not greater than MCAST_MAX. */
+ else if (dev->mc_count <= MCAST_MAX) {
+ i = 0;
+ while (i < dev->mc_count) {
+ u16 *adrp = (u16 *)dmi->dmi_addr;
dmi = dmi->next;
+ iowrite16(adrp[0], ioaddr + MID_1L + 8 * i);
+ iowrite16(adrp[1], ioaddr + MID_1M + 8 * i);
+ iowrite16(adrp[2], ioaddr + MID_1H + 8 * i);
+ i++;
+ }
+ while (i < MCAST_MAX) {
+ iowrite16(0, ioaddr + MID_1L + 8 * i);
+ iowrite16(0, ioaddr + MID_1M + 8 * i);
+ iowrite16(0, ioaddr + MID_1H + 8 * i);
+ i++;
+ }
+ }
+ /* Otherwise, Enable multicast hash table function. */
+ else {
+ u32 crc;
- if (!(*addrs & 1))
- continue;
+ lp->mcr0 |= HASH_EN;
- crc = ether_crc_le(6, addrs);
+ for (i = 0; i < MCAST_MAX ; i++) {
+ iowrite16(0, ioaddr + MID_1L + 8 * i);
+ iowrite16(0, ioaddr + MID_1M + 8 * i);
+ iowrite16(0, ioaddr + MID_1H + 8 * i);
+ }
+
+ /* Build multicast hash table */
+ for (i = 0; i < dev->mc_count; i++) {
+ u8 *addrs = dmi->dmi_addr;
+ dmi = dmi->next;
+
+ crc = ether_crc(ETH_ALEN, addrs);
crc >>= 26;
- hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
+ hash_table[crc >> 4] |= 1 << (crc & 0xf);
}
- /* Fill the MAC hash tables with their values */
+ }
+ iowrite16(lp->mcr0, ioaddr + MCR0);
+
+ /* Fill the MAC hash tables with their values */
+ if (lp->mcr0 && HASH_EN) {
iowrite16(hash_table[0], ioaddr + MAR0);
iowrite16(hash_table[1], ioaddr + MAR1);
iowrite16(hash_table[2], ioaddr + MAR2);
iowrite16(hash_table[3], ioaddr + MAR3);
}
- /* Multicast Address 1~4 case */
- dmi = dev->mc_list;
- for (i = 0, dmi; (i < dev->mc_count) && (i < MCAST_MAX); i++) {
- adrp = (u16 *)dmi->dmi_addr;
- iowrite16(adrp[0], ioaddr + MID_1L + 8*i);
- iowrite16(adrp[1], ioaddr + MID_1M + 8*i);
- iowrite16(adrp[2], ioaddr + MID_1H + 8*i);
- dmi = dmi->next;
- }
- for (i = dev->mc_count; i < MCAST_MAX; i++) {
- iowrite16(0xffff, ioaddr + MID_1L + 8*i);
- iowrite16(0xffff, ioaddr + MID_1M + 8*i);
- iowrite16(0xffff, ioaddr + MID_1H + 8*i);
- }
+
+ spin_unlock_irqrestore(&lp->lock, flags);
}
static void netdev_get_drvinfo(struct net_device *dev,

724
target/linux/rdc/patches-2.6.32/100-rdc_boards.patch
View File

@ -1,724 +0,0 @@
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -125,6 +125,9 @@ libs-y += arch/x86/lib/
# See arch/x86/Kbuild for content of core part of the kernel
core-y += arch/x86/
+# RDC R-321X support
+core-$(CONFIG_X86_RDC321X) += arch/x86/mach-rdc321x/
+
# drivers-y are linked after core-y
drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/
drivers-$(CONFIG_PCI) += arch/x86/pci/
--- /dev/null
+++ b/arch/x86/mach-rdc321x/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the RDC321x specific parts of the kernel
+#
+obj-$(CONFIG_X86_RDC321X) := platform.o reboot.o boards/sitecom.o boards/ar525w.o boards/bifferboard.o boards/r8610.o
+
--- /dev/null
+++ b/arch/x86/mach-rdc321x/platform.c
@@ -0,0 +1,115 @@
+/*
+ * Generic RDC321x platform devices
+ *
+ * Copyright (C) 2007-2009 OpenWrt.org
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2008-2009 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/physmap.h>
+#include <linux/root_dev.h>
+
+#include <asm/rdc_boards.h>
+
+static struct rdc_platform_data rdcplat_data;
+
+/* LEDS */
+static struct platform_device rdc321x_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &rdcplat_data.led_data,
+ }
+};
+
+/* Button */
+static struct platform_device rdc321x_buttons = {
+ .name = "gpio-buttons",
+ .id = -1,
+ .dev = {
+ .platform_data = &rdcplat_data.button_data,
+ }
+};
+
+static __initdata struct platform_device *rdc321x_devs[] = {
+ &rdc321x_leds,
+ &rdc321x_buttons,
+};
+
+const char *__initdata boards[] = {
+ "Sitecom",
+ "AR525W",
+ "Bifferboard",
+ "R8610",
+ 0
+};
+
+static struct map_info rdc_map_info = {
+ .name = "rdc_flash",
+ .size = 0x800000, /* 8MB */
+ .phys = 0xFF800000, /* (u32) -rdc_map_info.size */
+ .bankwidth = 2,
+};
+
+static int __init rdc_board_setup(void)
+{
+ struct mtd_partition *partitions;
+ int count, res;
+ struct mtd_info *mtdinfo;
+
+ simple_map_init(&rdc_map_info);
+
+ while (1) {
+ rdc_map_info.virt = ioremap(rdc_map_info.phys,
+ rdc_map_info.size);
+ if (rdc_map_info.virt == NULL)
+ continue;
+
+ mtdinfo = do_map_probe("cfi_probe", &rdc_map_info);
+ if (mtdinfo == NULL)
+ mtdinfo = do_map_probe("jedec_probe", &rdc_map_info);
+ if (mtdinfo != NULL)
+ break;
+
+ iounmap(rdc_map_info.virt);
+ if ((rdc_map_info.size >>= 1) < 0x100000) /* 1MB */
+ panic("RDC321x: Could not find start of flash!");
+ rdc_map_info.phys = (u32) -rdc_map_info.size;
+ }
+
+ count = parse_mtd_partitions(mtdinfo, boards, &partitions,
+ (unsigned long) &rdcplat_data);
+
+ if (count <= 0) {
+ panic("RDC321x: can't identify board type");
+ return -ENOSYS;
+ }
+
+ ROOT_DEV = 0;
+ res = add_mtd_partitions(mtdinfo, partitions, count);
+ if (res)
+ return res;
+
+ return platform_add_devices(rdc321x_devs, ARRAY_SIZE(rdc321x_devs));
+}
+late_initcall(rdc_board_setup);
--- /dev/null
+++ b/arch/x86/mach-rdc321x/boards/ar525w.c
@@ -0,0 +1,243 @@
+/*
+ * ar525w RDC321x platform devices
+ *
+ * Copyright (C) 2007-2009 OpenWrt.org
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2008-2009 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/mtd/physmap.h>
+#include <linux/input.h>
+#include <linux/vmalloc.h>
+#include <linux/mtd/mtd.h>
+
+#include <asm/rdc_boards.h>
+
+struct image_header {
+ char magic[4]; /* ASICII: GMTK */
+ u32 checksum; /* CRC32 */
+ u32 version; /* x.x.x.x */
+ u32 kernelsz; /* The size of the kernel image */
+ u32 imagesz; /* The length of this image file ( kernel + romfs + this header) */
+ u32 pid; /* Product ID */
+ u32 fastcksum; /* Partial CRC32 on (First(256), medium(256), last(512)) */
+ u32 reserved;
+};
+
+static struct gpio_led ar525w_leds[] = {
+ { .name = "rdc321x:dmz", .gpio = 1, .active_low = 1},
+};
+static struct gpio_button ar525w_btns[] = {
+ {
+ .gpio = 6,
+ .code = BTN_0,
+ .desc = "Reset",
+ .active_low = 1,
+ }
+};
+
+static u32 __initdata crctab[257] = {
+ 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
+ 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+ 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+ 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+ 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
+ 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+ 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
+ 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+ 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+ 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+ 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
+ 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+ 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
+ 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+ 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+ 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+ 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
+ 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+ 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
+ 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+ 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
+ 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+ 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
+ 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+ 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
+ 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+ 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
+ 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+ 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
+ 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+ 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
+ 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+ 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
+ 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+ 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
+ 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+ 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
+ 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+ 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
+ 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+ 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
+ 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+ 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
+ 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+ 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
+ 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+ 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
+ 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+ 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
+ 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+ 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
+ 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+ 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
+ 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+ 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
+ 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+ 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
+ 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+ 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
+ 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+ 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
+ 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+ 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
+ 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
+ 0
+};
+
+static u32 __init crc32(u8 * buf, u32 len)
+{
+ register int i;
+ u32 sum;
+ register u32 s0;
+ s0 = ~0;
+ for (i = 0; i < len; i++) {
+ s0 = (s0 >> 8) ^ crctab[(u8) (s0 & 0xFF) ^ buf[i]];
+ }
+ sum = ~s0;
+ return sum;
+}
+
+static int __init fixup_ar525w_header(struct mtd_info *master, struct image_header *header)
+{
+ char *buffer;
+ int res;
+ u32 bufferlength = header->kernelsz + sizeof(struct image_header);
+ u32 len;
+ char crcbuf[0x400];
+
+ printk(KERN_INFO "Fixing up AR525W header, old image size: %u, new image size: %u\n",
+ header->imagesz, bufferlength);
+
+ buffer = vmalloc(bufferlength);
+ if (!buffer) {
+ printk(KERN_ERR "Can't allocate %u bytes\n", bufferlength);
+ return -ENOMEM;
+ }
+
+ res = master->read(master, 0x0, bufferlength, &len, buffer);
+ if (res || len != bufferlength)
+ goto out;
+
+ header = (struct image_header *) buffer;
+ header->imagesz = bufferlength;
+ header->checksum = 0;
+ header->fastcksum = 0;
+
+ memcpy(crcbuf, buffer, 0x100);
+ memcpy(crcbuf + 0x100, buffer + (bufferlength >> 1) - ((bufferlength & 0x6) >> 1), 0x100);
+ memcpy(crcbuf + 0x200, buffer + bufferlength - 0x200, 0x200);
+
+ header->fastcksum = crc32(crcbuf, sizeof(crcbuf));
+ header->checksum = crc32(buffer, bufferlength);
+
+ if (master->unlock)
+ master->unlock(master, 0, master->erasesize);
+ res = erase_write (master, 0, master->erasesize, buffer);
+ if (res)
+ printk(KERN_ERR "Can't rewrite image header\n");
+
+out:
+ vfree(buffer);
+ return res;
+}
+
+static int __init parse_ar525w_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long plat_data)
+{
+ struct image_header header;
+ int res;
+ size_t len;
+ struct mtd_partition *rdc_flash_parts;
+ struct rdc_platform_data *pdata = (struct rdc_platform_data *) plat_data;
+
+ if (master->size != 0x400000) //4MB
+ return -ENOSYS;
+
+ res = master->read(master, 0x0, sizeof(header), &len, (char *)&header);
+ if (res)
+ return res;
+
+ if (strncmp(header.magic, "GMTK", 4))
+ return -ENOSYS;
+
+ if (header.kernelsz > 0x400000 || header.kernelsz < master->erasesize) {
+ printk(KERN_ERR "AR525W image header found, but seems corrupt, kernel size %u\n", header.kernelsz);
+ return -EINVAL;
+ }
+
+ if (header.kernelsz + sizeof(header) != header.imagesz) {
+ res = fixup_ar525w_header(master, &header);
+ if (res)
+ return res;
+ }
+
+ rdc_flash_parts = kzalloc(sizeof(struct mtd_partition) * 3, GFP_KERNEL);
+
+ rdc_flash_parts[0].name = "firmware";
+ rdc_flash_parts[0].offset = 0x0;
+ rdc_flash_parts[0].size = 0x3E0000;
+ rdc_flash_parts[1].name = "rootfs";
+ rdc_flash_parts[1].offset = header.kernelsz + sizeof(header);
+ rdc_flash_parts[1].size = rdc_flash_parts[0].size - rdc_flash_parts[1].offset;
+ rdc_flash_parts[2].name = "bootloader";
+ rdc_flash_parts[2].offset = 0x3E0000;
+ rdc_flash_parts[2].size = 0x20000;
+
+ *pparts = rdc_flash_parts;
+
+ pdata->led_data.num_leds = ARRAY_SIZE(ar525w_leds);
+ pdata->led_data.leds = ar525w_leds;
+ pdata->button_data.nbuttons = ARRAY_SIZE(ar525w_btns);
+ pdata->button_data.buttons = ar525w_btns;
+
+ return 3;
+}
+
+static struct mtd_part_parser __initdata ar525w_parser = {
+ .owner = THIS_MODULE,
+ .parse_fn = parse_ar525w_partitions,
+ .name = "AR525W",
+};
+
+static int __init ar525w_setup(void)
+{
+ return register_mtd_parser(&ar525w_parser);
+}
+
+arch_initcall(ar525w_setup);
--- /dev/null
+++ b/arch/x86/mach-rdc321x/boards/bifferboard.c
@@ -0,0 +1,69 @@
+/*
+ * Bifferboard RDC321x platform devices
+ *
+ * Copyright (C) 2010 bifferos@yahoo.co.uk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/mtd/physmap.h>
+#include <linux/input.h>
+
+#include <asm/rdc_boards.h>
+
+static int __init parse_bifferboard_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long plat_data)
+{
+ int res;
+ size_t len;
+ struct mtd_partition *rdc_flash_parts;
+ u32 kernel_len;
+ u16 tmp;
+
+ res = master->read(master, 0x4000 + 1036, 2, &len, (char *) &tmp);
+ if (res)
+ return res;
+ kernel_len = tmp * master->erasesize;
+
+ rdc_flash_parts = kzalloc(sizeof(struct mtd_partition) * 3, GFP_KERNEL);
+
+ *pparts = rdc_flash_parts;
+
+ rdc_flash_parts[0].name = "kernel";
+ rdc_flash_parts[0].offset = 0;
+ rdc_flash_parts[0].size = kernel_len;
+ rdc_flash_parts[1].name = "rootfs";
+ rdc_flash_parts[1].offset = kernel_len;
+ rdc_flash_parts[1].size = master->size - kernel_len - 0x10000;
+ rdc_flash_parts[2].name = "biffboot";
+ rdc_flash_parts[2].offset = master->size - 0x10000;
+ rdc_flash_parts[2].size = 0x10000;
+
+ return 3;
+}
+
+struct mtd_part_parser __initdata bifferboard_parser = {
+ .owner = THIS_MODULE,
+ .parse_fn = parse_bifferboard_partitions,
+ .name = "Bifferboard",
+};
+
+static int __init bifferboard_setup(void)
+{
+ return register_mtd_parser(&bifferboard_parser);
+}
+arch_initcall(bifferboard_setup);
--- /dev/null
+++ b/arch/x86/mach-rdc321x/boards/r8610.c
@@ -0,0 +1,65 @@
+/*
+ * R8610 RDC321x platform devices
+ *
+ * Copyright (C) 2009, Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/mtd/physmap.h>
+#include <linux/input.h>
+
+#include <asm/rdc_boards.h>
+
+static int __init parse_r8610_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long plat_data)
+{
+ struct mtd_partition *rdc_flash_parts;
+
+ rdc_flash_parts = kzalloc(sizeof(struct mtd_partition) * 4, GFP_KERNEL);
+
+ *pparts = rdc_flash_parts;
+
+ rdc_flash_parts[0].name = "kernel";
+ rdc_flash_parts[0].size = 0x001f0000;
+ rdc_flash_parts[0].offset = 0;
+ rdc_flash_parts[1].name = "config";
+ rdc_flash_parts[1].size = 0x10000;
+ rdc_flash_parts[1].offset = MTDPART_OFS_APPEND;
+ rdc_flash_parts[2].name = "rootfs";
+ rdc_flash_parts[2].size = 0x1E0000;
+ rdc_flash_parts[2].offset = MTDPART_OFS_APPEND;
+ rdc_flash_parts[3].name = "redboot";
+ rdc_flash_parts[3].size = 0x20000;
+ rdc_flash_parts[3].offset = MTDPART_OFS_APPEND;
+ rdc_flash_parts[3].mask_flags = MTD_WRITEABLE;
+
+ return 4;
+}
+
+struct mtd_part_parser __initdata r8610_parser = {
+ .owner = THIS_MODULE,
+ .parse_fn = parse_r8610_partitions,
+ .name = "R8610",
+};
+
+static int __init r8610_setup(void)
+{
+ return register_mtd_parser(&r8610_parser);
+}
+
+arch_initcall(r8610_setup);
--- /dev/null
+++ b/arch/x86/mach-rdc321x/boards/sitecom.c
@@ -0,0 +1,111 @@
+/*
+ * Sitecom RDC321x platform devices
+ *
+ * Copyright (C) 2007-2009 OpenWrt.org
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2008-2009 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/mtd/physmap.h>
+#include <linux/input.h>
+
+#include <asm/rdc_boards.h>
+
+struct image_header {
+ char magic[4];
+ u32 kernel_length;
+ u32 ramdisk_length;
+ char magic2[4];
+ u32 kernel_length2;
+};
+
+static struct gpio_led sitecom_leds[] = {
+ { .name = "rdc321x:power", .gpio = 15, .active_low = 1},
+ { .name = "rdc321x:usb0", .gpio = 0, .active_low = 1},
+ { .name = "rdc321x:usb1", .gpio = 1, .active_low = 1},
+};
+
+static struct gpio_button sitecom_btns[] = {
+ {
+ .gpio = 6,
+ .code = BTN_0,
+ .desc = "Reset",
+ .active_low = 1,
+ }
+};
+
+static int __init parse_sitecom_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long plat_data)
+{
+ struct image_header header;
+ int res;
+ size_t len;
+ struct mtd_partition *rdc_flash_parts;
+ struct rdc_platform_data *pdata = (struct rdc_platform_data *) plat_data;
+
+ if (master->size != 0x400000) /* 4MB */
+ return -ENOSYS;
+
+ res = master->read(master, 0x8000, sizeof(header), &len, (char *)&header);
+ if (res)
+ return res;
+
+ if (strncmp(header.magic, "CSYS", 4) || strncmp(header.magic2, "WRRM", 4))
+ return -ENOSYS;
+
+ rdc_flash_parts = kzalloc(sizeof(struct mtd_partition) * 5, GFP_KERNEL);
+
+ rdc_flash_parts[0].name = "firmware";
+ rdc_flash_parts[0].offset = 0x8000;
+ rdc_flash_parts[0].size = 0x3F0000 - 0x8000;
+ rdc_flash_parts[1].name = "config";
+ rdc_flash_parts[1].offset = 0;
+ rdc_flash_parts[1].size = 0x8000;
+ rdc_flash_parts[2].name = "kernel";
+ rdc_flash_parts[2].offset = 0x8014;
+ rdc_flash_parts[2].size = header.kernel_length;
+ rdc_flash_parts[3].name = "rootfs";
+ rdc_flash_parts[3].offset = 0x8014 + header.kernel_length;
+ rdc_flash_parts[3].size = 0x3F0000 - rdc_flash_parts[3].offset;
+ rdc_flash_parts[4].name = "bootloader";
+ rdc_flash_parts[4].offset = 0x3F0000;
+ rdc_flash_parts[4].size = 0x10000;
+
+ *pparts = rdc_flash_parts;
+
+ pdata->led_data.num_leds = ARRAY_SIZE(sitecom_leds);
+ pdata->led_data.leds = sitecom_leds;
+ pdata->button_data.nbuttons = ARRAY_SIZE(sitecom_btns);
+ pdata->button_data.buttons = sitecom_btns;
+
+ return 5;
+}
+
+struct mtd_part_parser __initdata sitecom_parser = {
+ .owner = THIS_MODULE,
+ .parse_fn = parse_sitecom_partitions,
+ .name = "Sitecom",
+};
+
+static int __init sitecom_setup(void)
+{
+ return register_mtd_parser(&sitecom_parser);
+}
+
+arch_initcall(sitecom_setup);
--- /dev/null
+++ b/arch/x86/mach-rdc321x/reboot.c
@@ -0,0 +1,44 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <asm/reboot.h>
+#include <asm/io.h>
+
+static void rdc321x_reset(void)
+{
+ unsigned i;
+
+ /* write to southbridge config register 0x41
+ enable pci reset on cpu reset, make internal port 0x92 writeable
+ and switch port 0x92 to internal */
+ outl(0x80003840, 0xCF8);
+ i = inl(0xCFC);
+ i |= 0x1600;
+ outl(i, 0xCFC);
+
+ /* soft reset */
+ outb(1, 0x92);
+}
+
+static int __init rdc_setup_reset(void)
+{
+ machine_ops.emergency_restart = rdc321x_reset;
+ return 0;
+}
+
+arch_initcall(rdc_setup_reset);
--- /dev/null
+++ b/arch/x86/include/asm/rdc_boards.h
@@ -0,0 +1,36 @@
+/*
+ * RDC321x boards
+ *
+ * Copyright (C) 2007-2009 OpenWrt.org
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2008-2009 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#ifndef _RDC_BOARDS_H__
+#define _RDC_BOARDS_H__
+
+#include <linux/leds.h>
+#include <linux/gpio_buttons.h>
+
+struct rdc_platform_data {
+ struct gpio_led_platform_data led_data;
+ struct gpio_buttons_platform_data button_data;
+};
+
+#endif

313
target/linux/rdc/patches-2.6.32/110-rdc321x_watchdog_fix.patch
View File

@ -1,313 +0,0 @@
--- a/drivers/watchdog/rdc321x_wdt.c
+++ b/drivers/watchdog/rdc321x_wdt.c
@@ -36,111 +36,99 @@
#include <linux/watchdog.h>
#include <linux/io.h>
#include <linux/uaccess.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
#include <linux/mfd/rdc321x.h>
-#define RDC_WDT_MASK 0x80000000 /* Mask */
+#define RDC321X_WDT_REG 0x00000044
+
#define RDC_WDT_EN 0x00800000 /* Enable bit */
-#define RDC_WDT_WTI 0x00200000 /* Generate CPU reset/NMI/WDT on timeout */
-#define RDC_WDT_RST 0x00100000 /* Reset bit */
-#define RDC_WDT_WIF 0x00040000 /* WDT IRQ Flag */
-#define RDC_WDT_IRT 0x00000100 /* IRQ Routing table */
-#define RDC_WDT_CNT 0x00000001 /* WDT count */
+#define RDC_WDT_WDTIRQ 0x00400000 /* Create WDT IRQ before CPU reset */
+#define RDC_WDT_NMIIRQ 0x00200000 /* Create NMI IRQ before CPU reset */
+#define RDC_WDT_RST 0x00100000 /* Reset wdt */
+#define RDC_WDT_NIF 0x00080000 /* NMI interrupt occured */
+#define RDC_WDT_WIF 0x00040000 /* WDT interrupt occured */
+#define RDC_WDT_IRT 0x00000700 /* IRQ Routing table */
+#define RDC_WDT_CNT 0x0000007F /* WDT count */
-#define RDC_CLS_TMR 0x80003844 /* Clear timer */
+/* default counter value (2.34 s) */
+#define RDC_WDT_DFLT_CNT 0x00000040
-#define RDC_WDT_INTERVAL (HZ/10+1)
+#define RDC_WDT_SETUP (RDC_WDT_EN | RDC_WDT_NMIIRQ | RDC_WDT_RST | RDC_WDT_DFLT_CNT)
static int ticks = 1000;
/* some device data */
static struct {
- struct completion stop;
- int running;
struct timer_list timer;
- int queue;
- int default_ticks;
- unsigned long inuse;
- spinlock_t lock;
+ int seconds_left;
+ int total_seconds;
+ bool inuse;
+ bool running;
+ bool close_expected;
+
struct pci_dev *sb_pdev;
int base_reg;
} rdc321x_wdt_device;
-/* generic helper functions */
+static struct watchdog_info ident = {
+ .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+ .identity = "RDC321x WDT",
+};
-static void rdc321x_wdt_trigger(unsigned long unused)
+
+/* generic helper functions */
+static void rdc321x_wdt_timer(unsigned long unused)
{
- unsigned long flags;
- u32 val;
+ if (!rdc321x_wdt_device.running) {
+ pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg, 0);
+ return;
+ }
- if (rdc321x_wdt_device.running)
- ticks--;
+ rdc321x_wdt_device.seconds_left--;
- /* keep watchdog alive */
- spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
- pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
- rdc321x_wdt_device.base_reg, &val);
- val |= RDC_WDT_EN;
- pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
- rdc321x_wdt_device.base_reg, val);
- spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
+ if (rdc321x_wdt_device.seconds_left < 1)
+ return;
- /* requeue?? */
- if (rdc321x_wdt_device.queue && ticks)
- mod_timer(&rdc321x_wdt_device.timer,
- jiffies + RDC_WDT_INTERVAL);
- else {
- /* ticks doesn't matter anyway */
- complete(&rdc321x_wdt_device.stop);
- }
+ pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
+ rdc321x_wdt_device.base_reg, RDC_WDT_SETUP);
+ mod_timer(&rdc321x_wdt_device.timer, HZ * 2 + jiffies);
}
static void rdc321x_wdt_reset(void)
{
- ticks = rdc321x_wdt_device.default_ticks;
+ rdc321x_wdt_device.seconds_left = rdc321x_wdt_device.total_seconds;
}
static void rdc321x_wdt_start(void)
{
- unsigned long flags;
-
- if (!rdc321x_wdt_device.queue) {
- rdc321x_wdt_device.queue = 1;
-
- /* Clear the timer */
- spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
- pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
- rdc321x_wdt_device.base_reg, RDC_CLS_TMR);
-
- /* Enable watchdog and set the timeout to 81.92 us */
- pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
- rdc321x_wdt_device.base_reg,
- RDC_WDT_EN | RDC_WDT_CNT);
- spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
+ if (rdc321x_wdt_device.running)
+ return;
- mod_timer(&rdc321x_wdt_device.timer,
- jiffies + RDC_WDT_INTERVAL);
- }
+ rdc321x_wdt_device.seconds_left = rdc321x_wdt_device.total_seconds;
+ rdc321x_wdt_device.running = true;
+ rdc321x_wdt_timer(0);
- /* if process dies, counter is not decremented */
- rdc321x_wdt_device.running++;
+ return;
}
static int rdc321x_wdt_stop(void)
{
- if (rdc321x_wdt_device.running)
- rdc321x_wdt_device.running = 0;
+ if (WATCHDOG_NOWAYOUT)
+ return -ENOSYS;
- ticks = rdc321x_wdt_device.default_ticks;
+ rdc321x_wdt_device.running = false;
- return -EIO;
+ return 0;
}
/* filesystem operations */
static int rdc321x_wdt_open(struct inode *inode, struct file *file)
{
- if (test_and_set_bit(0, &rdc321x_wdt_device.inuse))
+ if (xchg(&rdc321x_wdt_device.inuse, true))
return -EBUSY;
return nonseekable_open(inode, file);
@@ -148,7 +136,16 @@ static int rdc321x_wdt_open(struct inode
static int rdc321x_wdt_release(struct inode *inode, struct file *file)
{
- clear_bit(0, &rdc321x_wdt_device.inuse);
+ int ret;
+
+ if (rdc321x_wdt_device.close_expected) {
+ ret = rdc321x_wdt_stop();
+ if (ret)
+ return ret;
+ }
+
+ rdc321x_wdt_device.inuse = false;
+
return 0;
}
@@ -156,30 +153,29 @@ static long rdc321x_wdt_ioctl(struct fil
unsigned long arg)
{
void __user *argp = (void __user *)arg;
- u32 value;
- static struct watchdog_info ident = {
- .options = WDIOF_CARDRESET,
- .identity = "RDC321x WDT",
- };
- unsigned long flags;
+ int value;
switch (cmd) {
case WDIOC_KEEPALIVE:
rdc321x_wdt_reset();
break;
- case WDIOC_GETSTATUS:
- /* Read the value from the DATA register */
- spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
- pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
- rdc321x_wdt_device.base_reg, &value);
- spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
- if (copy_to_user(argp, &value, sizeof(u32)))
- return -EFAULT;
- break;
case WDIOC_GETSUPPORT:
if (copy_to_user(argp, &ident, sizeof(ident)))
return -EFAULT;
break;
+ case WDIOC_SETTIMEOUT:
+ if (copy_from_user(&rdc321x_wdt_device.total_seconds, argp, sizeof(int)))
+ return -EFAULT;
+ rdc321x_wdt_device.seconds_left = rdc321x_wdt_device.total_seconds;
+ break;
+ case WDIOC_GETTIMEOUT:
+ if (copy_to_user(argp, &rdc321x_wdt_device.total_seconds, sizeof(int)))
+ return -EFAULT;
+ break;
+ case WDIOC_GETTIMELEFT:
+ if (copy_to_user(argp, &rdc321x_wdt_device.seconds_left, sizeof(int)))
+ return -EFAULT;
+ break;
case WDIOC_SETOPTIONS:
if (copy_from_user(&value, argp, sizeof(int)))
return -EFAULT;
@@ -194,17 +190,34 @@ static long rdc321x_wdt_ioctl(struct fil
}
break;
default:
- return -ENOTTY;
+ return -EINVAL;
}
+
return 0;
}
static ssize_t rdc321x_wdt_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
+ size_t i;
+
if (!count)
return -EIO;
+ rdc321x_wdt_device.close_expected = false;
+
+ for (i = 0; i != count; i++) {
+ char c;
+
+ if (get_user(c, buf + i))
+ return -EFAULT;
+
+ if (c == 'V') {
+ rdc321x_wdt_device.close_expected = true;
+ break;
+ }
+ }
+
rdc321x_wdt_reset();
return count;
@@ -246,27 +259,18 @@ static int __devinit rdc321x_wdt_probe(s
rdc321x_wdt_device.sb_pdev = pdata->sb_pdev;
rdc321x_wdt_device.base_reg = r->start;
+ rdc321x_wdt_device.running = false;
+ rdc321x_wdt_device.close_expected = false;
+ rdc321x_wdt_device.inuse = 0;
+ setup_timer(&rdc321x_wdt_device.timer, rdc321x_wdt_timer, 0);
+ rdc321x_wdt_device.total_seconds = 100;
+
err = misc_register(&rdc321x_wdt_misc);
if (err < 0) {
dev_err(&pdev->dev, "misc_register failed\n");
return err;
}
- spin_lock_init(&rdc321x_wdt_device.lock);
-
- /* Reset the watchdog */
- pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
- rdc321x_wdt_device.base_reg, RDC_WDT_RST);
-
- init_completion(&rdc321x_wdt_device.stop);
- rdc321x_wdt_device.queue = 0;
-
- clear_bit(0, &rdc321x_wdt_device.inuse);
-
- setup_timer(&rdc321x_wdt_device.timer, rdc321x_wdt_trigger, 0);
-
- rdc321x_wdt_device.default_ticks = ticks;
-
dev_info(&pdev->dev, "watchdog init success\n");
return 0;
@@ -274,10 +278,11 @@ static int __devinit rdc321x_wdt_probe(s
static int __devexit rdc321x_wdt_remove(struct platform_device *pdev)
{
- if (rdc321x_wdt_device.queue) {
- rdc321x_wdt_device.queue = 0;
- wait_for_completion(&rdc321x_wdt_device.stop);
- }
+ if (rdc321x_wdt_device.inuse)
+ rdc321x_wdt_device.inuse = 0;
+
+ while (timer_pending(&rdc321x_wdt_device.timer))
+ msleep(100);
misc_deregister(&rdc321x_wdt_misc);

11
target/linux/rdc/patches-2.6.32/120-panic_on_unrecovered_nmi.patch
View File

@ -1,11 +0,0 @@
--- a/drivers/mfd/rdc321x-southbridge.c
+++ b/drivers/mfd/rdc321x-southbridge.c
@@ -84,6 +84,8 @@ static int __devinit rdc321x_sb_probe(st
rdc321x_gpio_pdata.sb_pdev = pdev;
rdc321x_wdt_pdata.sb_pdev = pdev;
+ panic_on_unrecovered_nmi = 1;
+
return mfd_add_devices(&pdev->dev, -1,
rdc321x_sb_cells, ARRAY_SIZE(rdc321x_sb_cells), NULL, 0);
}