bcm4008: prepare to work on kernel 6.6
Don't add KERNEL_TESTING_PATCHVER yet as there are some issues with it. On TP-Link Archer C2300 serial console seems to stop working after preinit: > Press the [f] key and hit [enter] to enter failsafe mode > Press the [1], [2], [3] or [4] key and hit [enter] to select the de� On Netgear R8000P XHCI causes external abort: [ 2.139586] Internal error: synchronous external abort: 0000000096000210 [#1] SMP [ 2.147212] Modules linked in: xhci_plat_hcd(+) xhci_hcd ohci_platform ohci_hcd fsl_mph_dr_of ehci_platform ehci_fsl ehci_hcd gpio_button_hotplug(O) usbcore nls_base usb_common crc32c_generic [ 2.164774] CPU: 0 PID: 358 Comm: kmodloader Tainted: G O 6.6.22 #0 [ 2.172658] Hardware name: Netgear R8000P (DT) [ 2.177229] pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 2.184395] pc : xhci_gen_setup+0x80/0x34c [xhci_hcd] [ 2.189591] lr : xhci_gen_setup+0x74/0x34c [xhci_hcd] [ 2.194788] sp : ffffffc0815d37b0 [ 2.198194] x29: ffffffc0815d37b0 x28: ffffff8002000000 x27: ffffff8001172d88 [ 2.205540] x26: ffffff8002000000 x25: 0000000000000000 x24: ffffffc078b603c0 [ 2.212888] x23: ffffffc078b2a008 x22: ffffff8001172c10 x21: ffffff8002000000 [ 2.220235] x20: ffffff8002000000 x19: ffffff8002000250 x18: 0000000000000000 [ 2.227582] x17: 626d756e20737562 x16: 2064656e67697373 x15: ffffffffffffffff [ 2.234929] x14: ffffff80019e9915 x13: ffffff80019e9913 x12: 00000000ffffffea [ 2.242276] x11: 00000000ffffefff x10: 0000000000000062 x9 : 00000000ffffffd0 [ 2.246760] bcm63138_nand ff801800.nand-controller: timeout waiting for command 0x4 [ 2.249623] x8 : 0000000000000073 x7 : ffffffc0815d37c0 x6 : 0000000000000075 [ 2.257513] bcm63138_nand ff801800.nand-controller: intfc status c00000e0 [ 2.264855] x5 : 0000000000000081 x4 : 0000000000000000 x3 : ffffff8001b61800 [ 2.279193] x2 : ffffffc080b5d000 x1 : ffffff80020003a8 x0 : ffffff8002000398 [ 2.286540] Call trace: [ 2.289048] xhci_gen_setup+0x80/0x34c [xhci_hcd] Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This commit is contained in:
Rafał Miłecki
parent
4aff8d0d52
commit
c3dc52fb3c
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@ -0,0 +1,245 @@
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CONFIG_64BIT=y
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CONFIG_ARCH_BCM=y
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CONFIG_ARCH_BCMBCA=y
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CONFIG_ARCH_DMA_ADDR_T_64BIT=y
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CONFIG_ARCH_KEEP_MEMBLOCK=y
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CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
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CONFIG_ARCH_MMAP_RND_BITS=18
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CONFIG_ARCH_MMAP_RND_BITS_MAX=24
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CONFIG_ARCH_MMAP_RND_BITS_MIN=18
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CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
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CONFIG_ARCH_PROC_KCORE_TEXT=y
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CONFIG_ARCH_SPARSEMEM_ENABLE=y
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CONFIG_ARCH_STACKWALK=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANTS_NO_INSTR=y
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CONFIG_ARM64=y
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CONFIG_ARM64_4K_PAGES=y
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CONFIG_ARM64_CRYPTO=y
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CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
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CONFIG_ARM64_PAGE_SHIFT=12
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CONFIG_ARM64_PA_BITS=48
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CONFIG_ARM64_PA_BITS_48=y
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CONFIG_ARM64_PTR_AUTH=y
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CONFIG_ARM64_PTR_AUTH_KERNEL=y
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CONFIG_ARM64_SVE=y
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CONFIG_ARM64_TAGGED_ADDR_ABI=y
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CONFIG_ARM64_VA_BITS=39
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CONFIG_ARM64_VA_BITS_39=y
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CONFIG_ARM_AMBA=y
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CONFIG_ARM_ARCH_TIMER=y
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CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
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CONFIG_ARM_GIC=y
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CONFIG_ARM_GIC_V3=y
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CONFIG_ARM_GIC_V3_ITS=y
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CONFIG_ARM_PSCI_FW=y
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CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
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CONFIG_B53=y
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CONFIG_BCM4908_ENET=y
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CONFIG_BCM7038_WDT=y
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CONFIG_BCM7XXX_PHY=y
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CONFIG_BCM_NET_PHYLIB=y
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CONFIG_BCM_PMB=y
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# CONFIG_BLK_DEV_INITRD is not set
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CONFIG_BLK_PM=y
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CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
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CONFIG_CLK_BCM_63XX=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_CMDLINE="earlycon=bcm63xx_uart,0xff800640 console=ttyS0,115200"
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CONFIG_CMDLINE_FROM_BOOTLOADER=y
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CONFIG_COMMON_CLK=y
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# CONFIG_COMPAT_32BIT_TIME is not set
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CONFIG_CPU_LITTLE_ENDIAN=y
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CONFIG_CPU_RMAP=y
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CONFIG_CRC16=y
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CONFIG_CRYPTO_AES_ARM64=y
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CONFIG_CRYPTO_AES_ARM64_CE=y
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CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
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CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
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CONFIG_CRYPTO_CRYPTD=y
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CONFIG_CRYPTO_DEFLATE=y
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CONFIG_CRYPTO_GHASH_ARM64_CE=y
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CONFIG_CRYPTO_HASH_INFO=y
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CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
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CONFIG_CRYPTO_LZO=y
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CONFIG_CRYPTO_RNG2=y
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CONFIG_CRYPTO_SIMD=y
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CONFIG_CRYPTO_ZSTD=y
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CONFIG_DCACHE_WORD_ACCESS=y
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CONFIG_DMA_DIRECT_REMAP=y
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CONFIG_DMA_REMAP=y
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CONFIG_DTC=y
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CONFIG_EDAC_SUPPORT=y
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CONFIG_FIXED_PHY=y
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CONFIG_FIX_EARLYCON_MEM=y
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CONFIG_FRAME_POINTER=y
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CONFIG_FWNODE_MDIO=y
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CONFIG_FW_LOADER_PAGED_BUF=y
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CONFIG_GENERIC_ALLOCATOR=y
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CONFIG_GENERIC_ARCH_TOPOLOGY=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
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CONFIG_GENERIC_CPU_AUTOPROBE=y
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CONFIG_GENERIC_CPU_VULNERABILITIES=y
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CONFIG_GENERIC_CSUM=y
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CONFIG_GENERIC_EARLY_IOREMAP=y
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CONFIG_GENERIC_FIND_FIRST_BIT=y
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CONFIG_GENERIC_GETTIMEOFDAY=y
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CONFIG_GENERIC_IDLE_POLL_SETUP=y
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CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
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CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
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CONFIG_GENERIC_MSI_IRQ=y
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CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_PHY=y
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CONFIG_GENERIC_PINCONF=y
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CONFIG_GENERIC_PINCTRL_GROUPS=y
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CONFIG_GENERIC_PINMUX_FUNCTIONS=y
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CONFIG_GENERIC_SCHED_CLOCK=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GENERIC_STRNCPY_FROM_USER=y
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CONFIG_GENERIC_STRNLEN_USER=y
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CONFIG_GENERIC_TIME_VSYSCALL=y
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CONFIG_GPIO_CDEV=y
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CONFIG_GPIO_GENERIC=y
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CONFIG_GPIO_GENERIC_PLATFORM=y
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CONFIG_GRO_CELLS=y
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CONFIG_HANDLE_DOMAIN_IRQ=y
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CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_I2C=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_BRCMSTB=y
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CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_DOMAIN_HIERARCHY=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_WORK=y
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CONFIG_LEDS_BCM63138=y
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CONFIG_LEDS_GPIO=y
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CONFIG_LIBFDT=y
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CONFIG_LOCK_DEBUGGING_SUPPORT=y
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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CONFIG_MDIO_BCM_UNIMAC=y
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CONFIG_MDIO_BUS=y
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CONFIG_MDIO_DEVICE=y
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CONFIG_MDIO_DEVRES=y
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CONFIG_MEMFD_CREATE=y
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CONFIG_MFD_SYSCON=y
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CONFIG_MIGRATION=y
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# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
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CONFIG_MODULES_USE_ELF_RELA=y
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CONFIG_MTD_BRCM_U_BOOT=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_NAND_BRCMNAND=y
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CONFIG_MTD_NAND_BRCMNAND_BCMBCA=y
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CONFIG_MTD_NAND_CORE=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_ECC_SW_HAMMING=y
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CONFIG_MTD_OF_PARTS_BCM4908=y
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# CONFIG_MTD_OF_PARTS_LINKSYS_NS is not set
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CONFIG_MTD_RAW_NAND=y
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CONFIG_MTD_SPLIT_CFE_BOOTFS=y
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# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI_BLOCK=y
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MUTEX_SPIN_ON_OWNER=y
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CONFIG_NEED_DMA_MAP_STATE=y
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CONFIG_NEED_SG_DMA_LENGTH=y
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CONFIG_NET_DEVLINK=y
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CONFIG_NET_DSA=y
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CONFIG_NET_DSA_BCM_SF2=y
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CONFIG_NET_DSA_TAG_BRCM=y
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CONFIG_NET_DSA_TAG_BRCM_COMMON=y
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CONFIG_NET_DSA_TAG_BRCM_LEGACY=y
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CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
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CONFIG_NET_FLOW_LIMIT=y
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CONFIG_NET_SELFTESTS=y
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CONFIG_NET_SWITCHDEV=y
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CONFIG_NO_IOPORT_MAP=y
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CONFIG_NR_CPUS=4
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CONFIG_NVMEM=y
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CONFIG_NVMEM_SYSFS=y
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CONFIG_NVMEM_U_BOOT_ENV=y
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_KOBJ=y
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CONFIG_OF_MDIO=y
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CONFIG_PADATA=y
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CONFIG_PARTITION_PERCPU=y
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CONFIG_PGTABLE_LEVELS=3
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CONFIG_PHYLIB=y
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CONFIG_PHYLINK=y
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CONFIG_PHYS_ADDR_T_64BIT=y
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# CONFIG_PHY_BRCM_SATA is not set
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CONFIG_PHY_BRCM_USB=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_BCM4908=y
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# CONFIG_PINCTRL_SINGLE is not set
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CONFIG_PM=y
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CONFIG_PM_CLK=y
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CONFIG_PM_GENERIC_DOMAINS=y
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CONFIG_PM_GENERIC_DOMAINS_OF=y
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CONFIG_POWER_RESET=y
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CONFIG_POWER_RESET_SYSCON=y
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CONFIG_POWER_SUPPLY=y
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CONFIG_PTP_1588_CLOCK_OPTIONAL=y
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CONFIG_QUEUED_RWLOCKS=y
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CONFIG_QUEUED_SPINLOCKS=y
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CONFIG_RATIONAL=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_RELOCATABLE=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
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CONFIG_RPS=y
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CONFIG_RWSEM_SPIN_ON_OWNER=y
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# CONFIG_SERIAL_8250 is not set
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CONFIG_SERIAL_BCM63XX=y
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CONFIG_SERIAL_BCM63XX_CONSOLE=y
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CONFIG_SGL_ALLOC=y
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CONFIG_SMP=y
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CONFIG_SOCK_RX_QUEUE_MAPPING=y
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CONFIG_SPARSEMEM=y
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CONFIG_SPARSEMEM_EXTREME=y
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CONFIG_SPARSEMEM_VMEMMAP=y
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CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
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CONFIG_SPARSE_IRQ=y
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CONFIG_SRCU=y
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CONFIG_SWIOTLB=y
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CONFIG_SWPHY=y
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CONFIG_SYSCTL_EXCEPTION_TRACE=y
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CONFIG_THREAD_INFO_IN_TASK=y
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_TIMER_OF=y
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CONFIG_TIMER_PROBE=y
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CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
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CONFIG_TREE_RCU=y
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CONFIG_TREE_SRCU=y
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CONFIG_UBIFS_FS=y
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CONFIG_UNMAP_KERNEL_AT_EL0=y
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CONFIG_USB_SUPPORT=y
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CONFIG_VMAP_STACK=y
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CONFIG_WATCHDOG_CORE=y
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CONFIG_XPS=y
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CONFIG_XXHASH=y
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CONFIG_ZLIB_DEFLATE=y
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CONFIG_ZLIB_INFLATE=y
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CONFIG_ZONE_DMA32=y
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CONFIG_ZSTD_COMPRESS=y
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CONFIG_ZSTD_DECOMPRESS=y
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@ -0,0 +1,31 @@
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Thu, 28 Mar 2024 10:24:34 +0100
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Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: set
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brcm,wp-not-connected
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Every described BCM4908 board has WP pin not connected. This caused
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problems for drivers since day 0 but there was no property to describe
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that properly. Projects like OpenWrt were modifying Linux driver to deal
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with it.
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It's not clear if that is hardware limitation or just reference design
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being copied over and over but this applies to all known / supported
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BCM4908 boards. Handle it by marking WP as not connected by default.
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Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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---
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--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
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@@ -597,6 +597,7 @@
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reg-names = "nand", "nand-int-base";
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "nand_ctlrdy";
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+ brcm,wp-not-connected;
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status = "okay";
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nandcs: nand@0 {
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@ -0,0 +1,23 @@
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Mon, 15 Feb 2021 22:01:03 +0100
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Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: limit amount of GPIOs
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Linux driver can't handle more than 64 GPIOs
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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---
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--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
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@@ -344,7 +344,7 @@
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gpio0: gpio-controller@500 {
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compatible = "brcm,bcm6345-gpio";
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reg-names = "dirout", "dat";
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- reg = <0x500 0x28>, <0x528 0x28>;
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+ reg = <0x500 0x8>, <0x528 0x8>;
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#gpio-cells = <2>;
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gpio-controller;
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@ -0,0 +1,30 @@
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Thu, 12 Aug 2021 11:52:42 +0200
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Subject: [PATCH] arm64: don't issue HVC on boot
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Broadcom's CFE loader seems to miss setting SCR_EL3.HCE which results in
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generating an UNDEF and kernel panic on the first HVC.
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HVC gets issued by kernels 5.12+ while booting, by kexec and KVM. Until
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someone finds a workaround we have to avoid all above.
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Workarounds: 0c93df9622d4 ("arm64: Initialise as nVHE before switching to VHE")
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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---
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arch/arm64/kernel/hyp-stub.S | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm64/kernel/hyp-stub.S
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+++ b/arch/arm64/kernel/hyp-stub.S
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@@ -252,7 +252,7 @@ SYM_FUNC_START(finalise_el2)
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b.ne 1f
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mov x0, #HVC_FINALISE_EL2
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- hvc #0
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+// hvc #0
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1:
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ret
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SYM_FUNC_END(finalise_el2)
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|
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@ -0,0 +1,46 @@
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
|
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Date: Mon, 15 Feb 2021 23:59:26 +0100
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Subject: [PATCH] net: dsa: bcm_sf2: enable GPHY for switch probing
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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GPHY needs to be enabled to succesfully probe & setup switch port
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connected to it. Otherwise hardcoding PHY OUI would be required.
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Before:
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brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
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brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
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brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
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brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
|
||||
brcm-sf2 80080000.switch wan (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 7
|
||||
|
||||
After:
|
||||
brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
|
||||
brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
|
||||
brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
|
||||
brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
|
||||
brcm-sf2 80080000.switch wan (uninitialized): PHY [800c05c0.mdio--1:0c] driver [Generic PHY] (irq=POLL)
|
||||
|
||||
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
|
||||
---
|
||||
drivers/net/dsa/bcm_sf2.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/drivers/net/dsa/bcm_sf2.c
|
||||
+++ b/drivers/net/dsa/bcm_sf2.c
|
||||
@@ -1522,10 +1522,14 @@ static int bcm_sf2_sw_probe(struct platf
|
||||
rev = reg_readl(priv, REG_PHY_REVISION);
|
||||
priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK;
|
||||
|
||||
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
|
||||
+
|
||||
ret = b53_switch_register(dev);
|
||||
if (ret)
|
||||
goto out_mdio;
|
||||
|
||||
+ bcm_sf2_gphy_enable_set(priv->dev->ds, false);
|
||||
+
|
||||
dev_info(&pdev->dev,
|
||||
"Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n",
|
||||
priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff,
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
|
||||
Date: Tue, 16 Feb 2021 00:06:35 +0100
|
||||
Subject: [PATCH] net: dsa: bcm_sf2: keep GPHY enabled on the BCM4908
|
||||
|
||||
Trying to access disabled PHY results in MDIO_READ_FAIL and:
|
||||
[ 11.962886] brcm-sf2 80080000.switch wan: configuring for phy/internal link mode
|
||||
[ 11.972500] 8021q: adding VLAN 0 to HW filter on device wan
|
||||
[ 11.980205] ------------[ cut here ]------------
|
||||
[ 11.984885] WARNING: CPU: 0 PID: 7 at phy_error+0x10/0x58
|
||||
|
||||
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
|
||||
---
|
||||
drivers/net/dsa/bcm_sf2.c | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
--- a/drivers/net/dsa/bcm_sf2.c
|
||||
+++ b/drivers/net/dsa/bcm_sf2.c
|
||||
@@ -1536,6 +1536,12 @@ static int bcm_sf2_sw_probe(struct platf
|
||||
priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff,
|
||||
priv->irq0, priv->irq1);
|
||||
|
||||
+ /* BCM4908 has 5 GPHYs which means bcm_sf2_port_setup() will not enable
|
||||
+ * GPHY when needed. Leave it enabled here.
|
||||
+ */
|
||||
+ if (priv->type == BCM4908_DEVICE_ID)
|
||||
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
|
||||
+
|
||||
return 0;
|
||||
|
||||
out_mdio:
|
||||
Loading…
Reference in New Issue