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ag71xx: Fix rx ring buffer stall on small packets flood on qca956x and qca953x. 

Backported from Code Aurora QSDK

Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
This commit is contained in:
Vittorio Gambaletta 2017-03-25 18:08:02 +01:00 committed by Matthias Schiffer
parent e07ee06aad
commit c3cdc53164
No known key found for this signature in database
GPG Key ID: 16EF3F64CB201D9C
3 changed files with 22 additions and 1 deletions
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5
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
View File

@ -996,6 +996,9 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit = AR934X_RESET_GE0_MAC |
AR934X_RESET_GE0_MDIO;
pdata->set_speed = ar934x_set_speed_ge0;
if (ath79_soc == ATH79_SOC_QCA9533)
pdata->disable_inline_checksum_engine = 1;
} else {
pdata->reset_bit = AR934X_RESET_GE1_MAC |
AR934X_RESET_GE1_MDIO;
@ -1097,6 +1100,8 @@ void __init ath79_register_eth(unsigned int id)
pdata->set_speed = qca956x_set_speed_sgmii;
else
pdata->set_speed = ar934x_set_speed_ge0;
pdata->disable_inline_checksum_engine = 1;
} else {
pdata->reset_bit = QCA955X_RESET_GE1_MAC |
QCA955X_RESET_GE1_MDIO;

2
target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
View File

@ -37,7 +37,7 @@ struct ag71xx_platform_data {
u8 is_ar724x:1;
u8 has_ar8216:1;
u8 use_flow_control:1;
u8 is_qca956x:1;
u8 disable_inline_checksum_engine:1;
struct ag71xx_switch_platform_data *switch_data;

16
target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
View File

@ -629,6 +629,22 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update)
ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
if (pdata->disable_inline_checksum_engine) {
/*
* The rx ring buffer can stall on small packets on QCA953x and
* QCA956x. Disabling the inline checksum engine fixes the stall.
* The wr, rr functions cannot be used since this hidden register
* is outside of the normal ag71xx register block.
*/
void __iomem *dam = ioremap_nocache(0xb90001bc, 0x4);
if (dam) {
__raw_writel(__raw_readl(dam) & ~BIT(27), dam);
(void)__raw_readl(dam);
iounmap(dam);
}
}
ag71xx_hw_start(ag);
netif_carrier_on(ag->dev);