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mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-06-15 19:53:59 +02:00

lantiq: dts: assign the MDIO pins to the gsw node

Assign the MDIO pins to the switch node instead of using pin hogging
(where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.

This converts amazonse, ar9 and vr9. danube is skipped because the pin
controller doesn't define a pinmux for the MDIO pins (some of the SoC
pads may be hardwired to the MDIO pins instead of being configurable).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
This commit is contained in:
Martin Blumenstingl 2019-07-08 11:40:25 +02:00 committed by Adrian Schmutzler
parent 8ea7aa5380
commit b3bdfd5df5
19 changed files with 27 additions and 80 deletions

View File

@ -177,10 +177,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
pcie-rst {
lantiq,pins = "io21";
lantiq,pull = <0>;

View File

@ -119,18 +119,6 @@
lantiq,gphy-mode = <GPHY_MODE_FE>;
};
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
};
&localbus {
flash@0 {
compatible = "lantiq,nor";

View File

@ -197,10 +197,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
pci_rst {
lantiq,pins = "io21";
lantiq,output = <1>;

View File

@ -119,16 +119,6 @@
};
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";

View File

@ -198,10 +198,6 @@
"nand rd", "nand rdy";
lantiq,function = "ebu";
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
pci {
lantiq,groups = "gnt1", "req1";
lantiq,function = "pci";

View File

@ -193,11 +193,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
nand {
lantiq,groups = "nand cle", "nand ale",
"nand rd", "nand cs1", "nand rdy";

View File

@ -155,11 +155,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
phy-rst {
lantiq,pins = "io37", "io44";
lantiq,pull = <0>;

View File

@ -167,10 +167,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
pcie-rst {
lantiq,pins = "io11";
lantiq,open-drain = <1>;

View File

@ -123,10 +123,6 @@
lantiq,open-drain;
lantiq,pull = <0>;
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
usb_vbus: regulator-usb-vbus {

View File

@ -196,10 +196,6 @@
lantiq,groups = "exin3";
lantiq,function = "exin";
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
gphy-leds {
lantiq,groups = "gphy0 led1", "gphy1 led1",
"gphy0 led2", "gphy1 led2";

View File

@ -175,10 +175,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
gphy-leds {
lantiq,groups = "gphy0 led1", "gphy1 led1";
lantiq,function = "gphy";

View File

@ -115,10 +115,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
gphy-leds {
lantiq,groups = "gphy0 led0", "gphy0 led1",
"gphy0 led2", "gphy1 led0",

View File

@ -197,10 +197,6 @@
lantiq,pull = <2>;
lantiq,output = <1>;
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
pci-rst {
lantiq,pins = "io21";
lantiq,open-drain = <0>;

View File

@ -216,10 +216,6 @@
lantiq,output = <1>;
lantiq,pull = <0>;
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
pci-rst {
lantiq,pins = "io21";
lantiq,open-drain = <0>;

View File

@ -95,10 +95,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
gphy-leds {
lantiq,groups = "gphy0 led1", "gphy1 led1";
lantiq,function = "gphy";

View File

@ -225,10 +225,6 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
phy-rst {
lantiq,pins = "io42";
lantiq,pull = <0>;

View File

@ -148,6 +148,13 @@
#gpio-cells = <2>;
gpio-controller;
reg = <0xe100b10 0xa0>;
mdio_pins: mdio {
mux {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
};
asc1: serial@e100c00 {
@ -198,6 +205,8 @@
reg = <0xe180000 0x40000>;
interrupt-parent = <&icu0>;
interrupts = <105 109>;
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
};

View File

@ -168,6 +168,13 @@
#gpio-cells = <2>;
gpio-controller;
reg = <0xe100b10 0xa0>;
mdio_pins: mdio {
mux {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
};
stp: stp@e100bb0 {
@ -238,6 +245,8 @@
interrupt-parent = <&icu0>;
interrupts = <73 72>;
mac-address = [ 00 11 22 33 44 55 ];
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ppe@e234000 {

View File

@ -210,6 +210,13 @@
#gpio-cells = <2>;
gpio-controller;
reg = <0xe100b10 0xa0>;
mdio_pins: mdio {
mux {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
};
stp: stp@e100bb0 {
@ -285,6 +292,8 @@
resets = <&reset0 21 16>, <&reset0 8 8>;
reset-names = "switch", "ppe";
lantiq,phys = <&gphy0>, <&gphy1>;
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
mei@e116000 {