generic: 6.1, 6.6: remove patch which breaks WAN on MT7621

Importing pending patch "net: dsa: mt7530: move MT753X_MTRAP operations
for MT7530" broke WAN connectivity on most MT7621 which use PHY-muxing
to hook up either port 0 or port 4 to GMAC1.

Remove it for now until the author submits a fixed version.

Fixes: https://github.com/openwrt/openwrt/issues/15279
Fixes: https://github.com/openwrt/openwrt/issues/15273
Fixes: d40691a5fb ("generic: 6.1, 6.6: mt7530: import pending patches")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2024-04-27 03:19:03 +01:00
parent 2c0cec1eb0
commit a8dde7e5bd
16 changed files with 32 additions and 266 deletions

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@ -1,117 +0,0 @@
From 2982f395c9a513b168f1e685588f70013cba2f5f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Mon, 22 Apr 2024 10:15:14 +0300
Subject: [PATCH 07/15] net: dsa: mt7530: move MT753X_MTRAP operations for
MT7530
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
On MT7530, the media-independent interfaces of port 5 and 6 are controlled
by the MT7530_P5_DIS and MT7530_P6_DIS bits of the hardware trap. Deal with
these bits only when the relevant port is being enabled or disabled. This
ensures that these ports will be disabled when they are not in use.
Do not set MT7530_CHG_TRAP on mt7530_setup_port5() as that's already being
done on mt7530_setup().
Instead of globally setting MT7530_P5_MAC_SEL, clear it, then set it only
on the appropriate case.
If PHY muxing is detected, clear MT7530_P5_DIS before calling
mt7530_setup_port5().
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
drivers/net/dsa/mt7530.c | 38 +++++++++++++++++++++++++++-----------
1 file changed, 27 insertions(+), 11 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -873,8 +873,7 @@ static void mt7530_setup_port5(struct ds
val = mt7530_read(priv, MT753X_MTRAP);
- val |= MT7530_CHG_TRAP | MT7530_P5_MAC_SEL | MT7530_P5_DIS;
- val &= ~MT7530_P5_RGMII_MODE & ~MT7530_P5_PHY0_SEL;
+ val &= ~MT7530_P5_PHY0_SEL & ~MT7530_P5_MAC_SEL & ~MT7530_P5_RGMII_MODE;
switch (priv->p5_mode) {
/* MUX_PHY_P0: P0 -> P5 -> SoC MAC */
@@ -884,15 +883,13 @@ static void mt7530_setup_port5(struct ds
/* MUX_PHY_P4: P4 -> P5 -> SoC MAC */
case MUX_PHY_P4:
- val &= ~MT7530_P5_MAC_SEL & ~MT7530_P5_DIS;
-
/* Setup the MAC by default for the cpu port */
mt7530_write(priv, MT753X_PMCR_P(5), 0x56300);
break;
/* GMAC5: P5 -> SoC MAC or external PHY */
default:
- val &= ~MT7530_P5_DIS;
+ val |= MT7530_P5_MAC_SEL;
break;
}
@@ -1186,6 +1183,14 @@ mt7530_port_enable(struct dsa_switch *ds
mutex_unlock(&priv->reg_mutex);
+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
+ return 0;
+
+ if (port == 5)
+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
+ else if (port == 6)
+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P6_DIS);
+
return 0;
}
@@ -1204,6 +1209,14 @@ mt7530_port_disable(struct dsa_switch *d
PCR_MATRIX_CLR);
mutex_unlock(&priv->reg_mutex);
+
+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
+ return;
+
+ if (port == 5)
+ mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS);
+ else if (port == 6)
+ mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS);
}
static int
@@ -2392,11 +2405,11 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7530_TRGMII_RD(i),
RD_TAP_MASK, RD_TAP(16));
- /* Enable port 6 */
- val = mt7530_read(priv, MT753X_MTRAP);
- val &= ~MT7530_P6_DIS & ~MT7530_PHY_INDIRECT_ACCESS;
- val |= MT7530_CHG_TRAP;
- mt7530_write(priv, MT753X_MTRAP, val);
+ /* Allow modifying the trap and directly access PHY registers via the
+ * MDIO bus the switch is on.
+ */
+ mt7530_rmw(priv, MT753X_MTRAP, MT7530_CHG_TRAP |
+ MT7530_PHY_INDIRECT_ACCESS, MT7530_CHG_TRAP);
if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ)
mt7530_pll_setup(priv);
@@ -2479,8 +2492,11 @@ mt7530_setup(struct dsa_switch *ds)
break;
}
- if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4)
+ if (priv->p5_mode == MUX_PHY_P0 ||
+ priv->p5_mode == MUX_PHY_P4) {
+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
mt7530_setup_port5(ds, interface);
+ }
}
#ifdef CONFIG_GPIOLIB

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2658,7 +2658,9 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2642,7 +2642,9 @@ mt7531_setup(struct dsa_switch *ds)
0);
}
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Setup VLAN ID 0 for VLAN-unaware bridges */
ret = mt7530_setup_vlan0(priv);
@@ -3017,6 +3019,8 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3001,6 +3003,8 @@ mt753x_setup(struct dsa_switch *ds)
ret = mt7530_setup_mdio(priv);
if (ret && priv->irq)
mt7530_free_irq_common(priv);

View File

@ -24,7 +24,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2676,6 +2676,8 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2660,6 +2660,8 @@ mt7531_setup(struct dsa_switch *ds)
static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
@ -33,7 +33,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */
case 0 ... 4:
@@ -2707,6 +2709,8 @@ static void mt7531_mac_port_get_caps(str
@@ -2691,6 +2693,8 @@ static void mt7531_mac_port_get_caps(str
{
struct mt7530_priv *priv = ds->priv;
@ -42,7 +42,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */
case 0 ... 4:
@@ -2746,14 +2750,17 @@ static void mt7988_mac_port_get_caps(str
@@ -2730,14 +2734,17 @@ static void mt7988_mac_port_get_caps(str
case 0 ... 3:
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces);
@ -62,7 +62,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
}
@@ -2923,9 +2930,7 @@ static void mt753x_phylink_get_caps(stru
@@ -2907,9 +2914,7 @@ static void mt753x_phylink_get_caps(stru
{
struct mt7530_priv *priv = ds->priv;

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3220,13 +3220,6 @@ mt7530_probe_common(struct mt7530_priv *
@@ -3204,13 +3204,6 @@ mt7530_probe_common(struct mt7530_priv *
if (!priv->info)
return -EINVAL;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3048,10 +3048,10 @@ static int mt753x_get_mac_eee(struct dsa
@@ -3032,10 +3032,10 @@ static int mt753x_get_mac_eee(struct dsa
struct ethtool_eee *e)
{
struct mt7530_priv *priv = ds->priv;
@ -32,7 +32,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
return 0;
}
@@ -3065,11 +3065,11 @@ static int mt753x_set_mac_eee(struct dsa
@@ -3049,11 +3049,11 @@ static int mt753x_set_mac_eee(struct dsa
if (e->tx_lpi_timer > 0xFFF)
return -EINVAL;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1404,7 +1404,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
@@ -1391,7 +1391,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,
G0_PORT_VID_DEF);
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
if (dsa_is_user_port(ds, i) &&
dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {
all_user_ports_removed = false;
@@ -2419,7 +2419,7 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2406,7 +2406,7 @@ mt7530_setup(struct dsa_switch *ds)
/* Enable and reset MIB counters */
mt7530_mib_reset(ds);
@ -37,7 +37,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@@ -2530,7 +2530,7 @@ mt7531_setup_common(struct dsa_switch *d
@@ -2514,7 +2514,7 @@ mt7531_setup_common(struct dsa_switch *d
mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK |
UNU_FFP_MASK);
@ -46,7 +46,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@@ -2617,7 +2617,7 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2601,7 +2601,7 @@ mt7531_setup(struct dsa_switch *ds)
priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
/* Force link down on all ports before internal reset */

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2776,7 +2776,7 @@ mt7530_mac_config(struct dsa_switch *ds,
@@ -2760,7 +2760,7 @@ mt7530_mac_config(struct dsa_switch *ds,
mt7530_setup_port6(priv->ds, interface);
}
@ -26,7 +26,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
phy_interface_t interface,
struct phy_device *phydev)
{
@@ -2827,7 +2827,7 @@ mt7531_mac_config(struct dsa_switch *ds,
@@ -2811,7 +2811,7 @@ mt7531_mac_config(struct dsa_switch *ds,
if (phy_interface_mode_is_rgmii(interface)) {
dp = dsa_to_port(ds, port);
phydev = dp->slave->phydev;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2626,7 +2626,10 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2610,7 +2610,10 @@ mt7531_setup(struct dsa_switch *ds)
if (!priv->p5_sgmii) {
mt7531_pll_setup(priv);
} else {

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@ -1,117 +0,0 @@
From 2982f395c9a513b168f1e685588f70013cba2f5f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Mon, 22 Apr 2024 10:15:14 +0300
Subject: [PATCH 07/15] net: dsa: mt7530: move MT753X_MTRAP operations for
MT7530
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
On MT7530, the media-independent interfaces of port 5 and 6 are controlled
by the MT7530_P5_DIS and MT7530_P6_DIS bits of the hardware trap. Deal with
these bits only when the relevant port is being enabled or disabled. This
ensures that these ports will be disabled when they are not in use.
Do not set MT7530_CHG_TRAP on mt7530_setup_port5() as that's already being
done on mt7530_setup().
Instead of globally setting MT7530_P5_MAC_SEL, clear it, then set it only
on the appropriate case.
If PHY muxing is detected, clear MT7530_P5_DIS before calling
mt7530_setup_port5().
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
drivers/net/dsa/mt7530.c | 38 +++++++++++++++++++++++++++-----------
1 file changed, 27 insertions(+), 11 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -880,8 +880,7 @@ static void mt7530_setup_port5(struct ds
val = mt7530_read(priv, MT753X_MTRAP);
- val |= MT7530_CHG_TRAP | MT7530_P5_MAC_SEL | MT7530_P5_DIS;
- val &= ~MT7530_P5_RGMII_MODE & ~MT7530_P5_PHY0_SEL;
+ val &= ~MT7530_P5_PHY0_SEL & ~MT7530_P5_MAC_SEL & ~MT7530_P5_RGMII_MODE;
switch (priv->p5_mode) {
/* MUX_PHY_P0: P0 -> P5 -> SoC MAC */
@@ -891,15 +890,13 @@ static void mt7530_setup_port5(struct ds
/* MUX_PHY_P4: P4 -> P5 -> SoC MAC */
case MUX_PHY_P4:
- val &= ~MT7530_P5_MAC_SEL & ~MT7530_P5_DIS;
-
/* Setup the MAC by default for the cpu port */
mt7530_write(priv, MT753X_PMCR_P(5), 0x56300);
break;
/* GMAC5: P5 -> SoC MAC or external PHY */
default:
- val &= ~MT7530_P5_DIS;
+ val |= MT7530_P5_MAC_SEL;
break;
}
@@ -1193,6 +1190,14 @@ mt7530_port_enable(struct dsa_switch *ds
mutex_unlock(&priv->reg_mutex);
+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
+ return 0;
+
+ if (port == 5)
+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
+ else if (port == 6)
+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P6_DIS);
+
return 0;
}
@@ -1211,6 +1216,14 @@ mt7530_port_disable(struct dsa_switch *d
PCR_MATRIX_CLR);
mutex_unlock(&priv->reg_mutex);
+
+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
+ return;
+
+ if (port == 5)
+ mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS);
+ else if (port == 6)
+ mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS);
}
static int
@@ -2401,11 +2414,11 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7530_TRGMII_RD(i),
RD_TAP_MASK, RD_TAP(16));
- /* Enable port 6 */
- val = mt7530_read(priv, MT753X_MTRAP);
- val &= ~MT7530_P6_DIS & ~MT7530_PHY_INDIRECT_ACCESS;
- val |= MT7530_CHG_TRAP;
- mt7530_write(priv, MT753X_MTRAP, val);
+ /* Allow modifying the trap and directly access PHY registers via the
+ * MDIO bus the switch is on.
+ */
+ mt7530_rmw(priv, MT753X_MTRAP, MT7530_CHG_TRAP |
+ MT7530_PHY_INDIRECT_ACCESS, MT7530_CHG_TRAP);
if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ)
mt7530_pll_setup(priv);
@@ -2488,8 +2501,11 @@ mt7530_setup(struct dsa_switch *ds)
break;
}
- if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4)
+ if (priv->p5_mode == MUX_PHY_P0 ||
+ priv->p5_mode == MUX_PHY_P4) {
+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
mt7530_setup_port5(ds, interface);
+ }
}
#ifdef CONFIG_GPIOLIB

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2667,7 +2667,9 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2651,7 +2651,9 @@ mt7531_setup(struct dsa_switch *ds)
0);
}
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Setup VLAN ID 0 for VLAN-unaware bridges */
ret = mt7530_setup_vlan0(priv);
@@ -3020,6 +3022,8 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3004,6 +3006,8 @@ mt753x_setup(struct dsa_switch *ds)
ret = mt7530_setup_mdio(priv);
if (ret && priv->irq)
mt7530_free_irq_common(priv);

View File

@ -24,7 +24,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2685,6 +2685,8 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2669,6 +2669,8 @@ mt7531_setup(struct dsa_switch *ds)
static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
@ -33,7 +33,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */
case 0 ... 4:
@@ -2716,6 +2718,8 @@ static void mt7531_mac_port_get_caps(str
@@ -2700,6 +2702,8 @@ static void mt7531_mac_port_get_caps(str
{
struct mt7530_priv *priv = ds->priv;
@ -42,7 +42,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */
case 0 ... 4:
@@ -2755,14 +2759,17 @@ static void mt7988_mac_port_get_caps(str
@@ -2739,14 +2743,17 @@ static void mt7988_mac_port_get_caps(str
case 0 ... 3:
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces);
@ -62,7 +62,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
}
@@ -2932,9 +2939,7 @@ static void mt753x_phylink_get_caps(stru
@@ -2916,9 +2923,7 @@ static void mt753x_phylink_get_caps(stru
{
struct mt7530_priv *priv = ds->priv;

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3232,13 +3232,6 @@ mt7530_probe_common(struct mt7530_priv *
@@ -3216,13 +3216,6 @@ mt7530_probe_common(struct mt7530_priv *
if (!priv->info)
return -EINVAL;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3051,10 +3051,10 @@ static int mt753x_get_mac_eee(struct dsa
@@ -3035,10 +3035,10 @@ static int mt753x_get_mac_eee(struct dsa
struct ethtool_eee *e)
{
struct mt7530_priv *priv = ds->priv;
@ -32,7 +32,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
return 0;
}
@@ -3068,11 +3068,11 @@ static int mt753x_set_mac_eee(struct dsa
@@ -3052,11 +3052,11 @@ static int mt753x_set_mac_eee(struct dsa
if (e->tx_lpi_timer > 0xFFF)
return -EINVAL;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1411,7 +1411,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
@@ -1398,7 +1398,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,
G0_PORT_VID_DEF);
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
if (dsa_is_user_port(ds, i) &&
dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {
all_user_ports_removed = false;
@@ -2428,7 +2428,7 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2415,7 +2415,7 @@ mt7530_setup(struct dsa_switch *ds)
/* Enable and reset MIB counters */
mt7530_mib_reset(ds);
@ -37,7 +37,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@@ -2539,7 +2539,7 @@ mt7531_setup_common(struct dsa_switch *d
@@ -2523,7 +2523,7 @@ mt7531_setup_common(struct dsa_switch *d
mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK |
UNU_FFP_MASK);
@ -46,7 +46,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@@ -2626,7 +2626,7 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2610,7 +2610,7 @@ mt7531_setup(struct dsa_switch *ds)
priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
/* Force link down on all ports before internal reset */

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2785,7 +2785,7 @@ mt7530_mac_config(struct dsa_switch *ds,
@@ -2769,7 +2769,7 @@ mt7530_mac_config(struct dsa_switch *ds,
mt7530_setup_port6(priv->ds, interface);
}
@ -26,7 +26,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
phy_interface_t interface,
struct phy_device *phydev)
{
@@ -2836,7 +2836,7 @@ mt7531_mac_config(struct dsa_switch *ds,
@@ -2820,7 +2820,7 @@ mt7531_mac_config(struct dsa_switch *ds,
if (phy_interface_mode_is_rgmii(interface)) {
dp = dsa_to_port(ds, port);
phydev = dp->slave->phydev;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2635,7 +2635,10 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2619,7 +2619,10 @@ mt7531_setup(struct dsa_switch *ds)
if (!priv->p5_sgmii) {
mt7531_pll_setup(priv);
} else {