lantiq: Refresh patches and configuration

Make all the patches apply and delete the ones already integrated into
upstream Linux kernel. This also refreshes some of the kernel
configurations.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
[refreshed for linux 6.1.89]
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This commit is contained in:
Hauke Mehrtens 2023-06-02 22:13:48 +02:00 committed by Martin Schiller
parent e692742be7
commit a3659b158b
33 changed files with 148 additions and 1423 deletions

View File

@ -4,8 +4,11 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
@ -17,7 +20,6 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
@ -25,25 +27,29 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
# CONFIG_DT_EASY50712 is not set
CONFIG_EARLY_PRINTK=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC10_NO_ARRAY_BOUNDS=y
CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
@ -58,7 +64,6 @@ CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_MM_LANTIQ=y
CONFIG_GPIO_STP_XWAY=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
@ -91,7 +96,6 @@ CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
CONFIG_MIPS_EBPF_JIT=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_MT_SMP is not set
@ -124,10 +128,14 @@ CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHY_LANTIQ_RCU_USB2=y
# CONFIG_PHY_LANTIQ_VRX200_PCIE is not set
CONFIG_PINCTRL=y
@ -136,7 +144,9 @@ CONFIG_PINCTRL_LANTIQ=y
CONFIG_PINCTRL_XWAY=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_CONTROLLER=y

View File

@ -65,15 +65,15 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
endif
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -43,6 +43,8 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
@@ -41,6 +41,8 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o
obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
+obj-$(CONFIG_PCIE_LANTIQ) += ifxmips_pcie_phy.o ifxmips_pcie.o fixup-lantiq-pcie.o
+obj-$(CONFIG_PCIE_LANTIQ_MSI) += pcie-lantiq-msi.o
obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o
--- /dev/null
+++ b/arch/mips/pci/fixup-lantiq-pcie.c
@@ -0,0 +1,74 @@
@ -5524,8 +5524,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
(transaction layer end-to-end CRC checking).
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1483,6 +1483,8 @@ void pci_walk_bus(struct pci_bus *top, i
void *userdata);
@@ -1558,6 +1558,8 @@ void pci_walk_bus_locked(struct pci_bus
void *userdata);
int pci_cfg_space_size(struct pci_dev *dev);
unsigned char pci_bus_max_busnr(struct pci_bus *bus);
+int pcibios_host_nr(void);
@ -5535,7 +5535,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
unsigned long type);
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1086,6 +1086,12 @@
@@ -1097,6 +1097,12 @@
#define PCI_DEVICE_ID_SGI_IOC3 0x0003
#define PCI_DEVICE_ID_SGI_LITHIUM 0x1002

View File

@ -95,7 +95,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
}
static int xway_dev_ready(struct nand_chip *chip)
@@ -170,6 +223,7 @@ static int xway_nand_probe(struct platfo
@@ -169,6 +222,7 @@ static int xway_nand_probe(struct platfo
int err;
u32 cs;
u32 cs_flag = 0;
@ -103,7 +103,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
/* Allocate memory for the device structure (and zero it) */
data = devm_kzalloc(&pdev->dev, sizeof(struct xway_nand_data),
@@ -206,6 +260,15 @@ static int xway_nand_probe(struct platfo
@@ -204,6 +258,15 @@ static int xway_nand_probe(struct platfo
if (!err && cs == 1)
cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1;

View File

@ -19,7 +19,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
*/
#include <linux/kernel.h>
@@ -20,11 +20,16 @@
@@ -20,12 +20,17 @@
#include <linux/mm.h>
#include <linux/platform_device.h>
#include <linux/ethtool.h>
@ -29,6 +29,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/module.h>
#include <linux/property.h>
+#include <linux/clk.h>
+#include <linux/of_net.h>
+#include <linux/of_irq.h>
@ -36,7 +37,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
#include <asm/checksum.h>
@@ -32,7 +37,7 @@
@@ -33,7 +38,7 @@
#include <xway_dma.h>
#include <lantiq_platform.h>
@ -45,7 +46,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
#define MDIO_REQUEST 0x80000000
#define MDIO_READ 0x40000000
#define MDIO_ADDR_MASK 0x1f
@@ -41,44 +46,91 @@
@@ -42,44 +47,91 @@
#define MDIO_REG_OFFSET 0x10
#define MDIO_VAL_MASK 0xffff
@ -85,8 +86,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
-/* use 2 static channels for TX/RX */
-#define LTQ_ETOP_TX_CHANNEL 1
-#define LTQ_ETOP_RX_CHANNEL 6
-#define IS_TX(x) (x == LTQ_ETOP_TX_CHANNEL)
-#define IS_RX(x) (x == LTQ_ETOP_RX_CHANNEL)
-#define IS_TX(x) ((x) == LTQ_ETOP_TX_CHANNEL)
-#define IS_RX(x) ((x) == LTQ_ETOP_RX_CHANNEL)
+#define ETOP_CFG_MASK 0xfff
+#define ETOP_CFG_FEN0 (1 << 8)
+#define ETOP_CFG_SEN0 (1 << 6)
@ -152,7 +153,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
struct net_device *netdev;
struct napi_struct napi;
struct ltq_dma_channel dma;
@@ -88,23 +140,36 @@ struct ltq_etop_chan {
@@ -89,26 +141,39 @@ struct ltq_etop_chan {
struct ltq_etop_priv {
struct net_device *netdev;
struct platform_device *pdev;
@ -166,6 +167,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ struct ltq_etop_chan txch;
+ struct ltq_etop_chan rxch;
int tx_burst_len;
int rx_burst_len;
- spinlock_t lock;
+ int tx_irq;
+ int rx_irq;
@ -193,8 +197,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ ch->skb[ch->dma.desc] = dev_alloc_skb(MAX_DMA_DATA_LEN);
if (!ch->skb[ch->dma.desc])
return -ENOMEM;
ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(&priv->pdev->dev,
@@ -139,8 +204,11 @@ ltq_etop_hw_receive(struct ltq_etop_chan
ch->dma.desc_base[ch->dma.desc].addr =
@@ -143,8 +208,11 @@ ltq_etop_hw_receive(struct ltq_etop_chan
spin_unlock_irqrestore(&priv->lock, flags);
skb_put(skb, len);
@ -206,7 +210,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
}
static int
@@ -148,7 +216,9 @@ ltq_etop_poll_rx(struct napi_struct *nap
@@ -152,7 +220,9 @@ ltq_etop_poll_rx(struct napi_struct *nap
{
struct ltq_etop_chan *ch = container_of(napi,
struct ltq_etop_chan, napi);
@ -216,7 +220,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
while (work_done < budget) {
struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
@@ -160,7 +230,9 @@ ltq_etop_poll_rx(struct napi_struct *nap
@@ -164,7 +234,9 @@ ltq_etop_poll_rx(struct napi_struct *nap
}
if (work_done < budget) {
napi_complete_done(&ch->napi, work_done);
@ -226,7 +230,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
}
return work_done;
}
@@ -172,12 +244,14 @@ ltq_etop_poll_tx(struct napi_struct *nap
@@ -176,12 +248,14 @@ ltq_etop_poll_tx(struct napi_struct *nap
container_of(napi, struct ltq_etop_chan, napi);
struct ltq_etop_priv *priv = netdev_priv(ch->netdev);
struct netdev_queue *txq =
@ -242,7 +246,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
dev_kfree_skb_any(ch->skb[ch->tx_free]);
ch->skb[ch->tx_free] = NULL;
memset(&ch->dma.desc_base[ch->tx_free], 0,
@@ -190,7 +264,9 @@ ltq_etop_poll_tx(struct napi_struct *nap
@@ -194,7 +268,9 @@ ltq_etop_poll_tx(struct napi_struct *nap
if (netif_tx_queue_stopped(txq))
netif_tx_start_queue(txq);
napi_complete(&ch->napi);
@ -252,7 +256,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
return 1;
}
@@ -198,9 +274,10 @@ static irqreturn_t
@@ -202,9 +278,10 @@ static irqreturn_t
ltq_etop_dma_irq(int irq, void *_priv)
{
struct ltq_etop_priv *priv = _priv;
@ -266,16 +270,16 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
return IRQ_HANDLED;
}
@@ -212,7 +289,7 @@ ltq_etop_free_channel(struct net_device
@@ -216,7 +293,7 @@ ltq_etop_free_channel(struct net_device
ltq_dma_free(&ch->dma);
if (ch->dma.irq)
free_irq(ch->dma.irq, priv);
- if (IS_RX(ch->idx)) {
+ if (ch == &priv->txch) {
int desc;
for (desc = 0; desc < LTQ_DESC_NUM; desc++)
dev_kfree_skb_any(ch->skb[ch->dma.desc]);
@@ -223,66 +300,135 @@ static void
@@ -228,80 +305,135 @@ static void
ltq_etop_hw_exit(struct net_device *dev)
{
struct ltq_etop_priv *priv = netdev_priv(dev);
@ -330,6 +334,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
{
struct ltq_etop_priv *priv = netdev_priv(dev);
- int i;
- int err;
+ phy_interface_t mii_mode = priv->mii_mode;
- ltq_pmu_enable(PMU_PPE);
@ -347,15 +352,15 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+
+ switch (mii_mode) {
case PHY_INTERFACE_MODE_RMII:
- ltq_etop_w32_mask(ETOP_MII_MASK,
- ETOP_MII_REVERSE, LTQ_ETOP_CFG);
- ltq_etop_w32_mask(ETOP_MII_MASK, ETOP_MII_REVERSE,
- LTQ_ETOP_CFG);
+ ltq_etop_w32_mask(ETOP_CFG_MASK, ETOP_CFG_REMII0 | ETOP_CFG_OFF1 |
+ ETOP_CFG_SEN0 | ETOP_CFG_FEN0, LTQ_ETOP_CFG);
break;
case PHY_INTERFACE_MODE_MII:
- ltq_etop_w32_mask(ETOP_MII_MASK,
- ETOP_MII_NORMAL, LTQ_ETOP_CFG);
- ltq_etop_w32_mask(ETOP_MII_MASK, ETOP_MII_NORMAL,
- LTQ_ETOP_CFG);
+ ltq_etop_w32_mask(ETOP_CFG_MASK, ETOP_CFG_OFF1 |
+ ETOP_CFG_SEN0 | ETOP_CFG_FEN0, LTQ_ETOP_CFG);
break;
@ -374,8 +379,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ break;
+ }
netdev_err(dev, "unknown mii mode %d\n",
- priv->pldata->mii_mode);
+ mii_mode);
- priv->pldata->mii_mode);
+ mii_mode);
return -ENOTSUPP;
}
@ -392,18 +397,25 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ int rx = priv->rx_irq - LTQ_DMA_ETOP;
+ int err;
ltq_dma_init_port(DMA_PORT_ETOP);
ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, priv->rx_burst_len);
- for (i = 0; i < MAX_DMA_CHAN; i++) {
- int irq = LTQ_DMA_CH0_INT + i;
- struct ltq_etop_chan *ch = &priv->ch[i];
-
- ch->idx = ch->dma.nr = i;
- ch->dma.nr = i;
- ch->idx = ch->dma.nr;
- ch->dma.dev = &priv->pdev->dev;
-
- if (IS_TX(i)) {
- ltq_dma_alloc_tx(&ch->dma);
- request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv);
- err = request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv);
- if (err) {
- netdev_err(dev,
- "Unable to get Tx DMA IRQ %d\n",
- irq);
- return err;
- }
- } else if (IS_RX(i)) {
- ltq_dma_alloc_rx(&ch->dma);
- for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM;
@ -411,7 +423,13 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
- if (ltq_etop_alloc_skb(ch))
- return -ENOMEM;
- ch->dma.desc = 0;
- request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv);
- err = request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv);
- if (err) {
- netdev_err(dev,
- "Unable to get Rx DMA IRQ %d\n",
- irq);
- return err;
- }
+ priv->txch.dma.nr = tx;
+ priv->txch.dma.dev = &priv->pdev->dev;
+ ltq_dma_alloc_tx(&priv->txch.dma);
@ -446,7 +464,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
}
static void
@@ -301,6 +447,39 @@ static const struct ethtool_ops ltq_etop
@@ -320,6 +452,39 @@ static const struct ethtool_ops ltq_etop
};
static int
@ -486,7 +504,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data)
{
u32 val = MDIO_REQUEST |
@@ -308,9 +487,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in
@@ -327,9 +492,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in
((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) |
phy_data;
@ -498,7 +516,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
return 0;
}
@@ -321,12 +500,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in
@@ -340,12 +505,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in
((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) |
((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET);
@ -515,7 +533,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
return val;
}
@@ -342,7 +521,10 @@ ltq_etop_mdio_probe(struct net_device *d
@@ -361,7 +526,10 @@ ltq_etop_mdio_probe(struct net_device *d
struct ltq_etop_priv *priv = netdev_priv(dev);
struct phy_device *phydev;
@ -527,7 +545,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
if (!phydev) {
netdev_err(dev, "no PHY found\n");
@@ -350,14 +532,17 @@ ltq_etop_mdio_probe(struct net_device *d
@@ -369,14 +537,17 @@ ltq_etop_mdio_probe(struct net_device *d
}
phydev = phy_connect(dev, phydev_name(phydev),
@ -547,7 +565,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
phy_attached_info(phydev);
@@ -378,8 +563,13 @@ ltq_etop_mdio_init(struct net_device *de
@@ -397,8 +568,13 @@ ltq_etop_mdio_init(struct net_device *de
}
priv->mii_bus->priv = dev;
@ -562,8 +580,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ }
priv->mii_bus->name = "ltq_mii";
snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
priv->pdev->name, priv->pdev->id);
@@ -416,18 +606,21 @@ static int
priv->pdev->name, priv->pdev->id);
@@ -435,18 +611,21 @@ static int
ltq_etop_open(struct net_device *dev)
{
struct ltq_etop_priv *priv = netdev_priv(dev);
@ -595,7 +613,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
netif_tx_start_all_queues(dev);
return 0;
}
@@ -436,18 +629,19 @@ static int
@@ -455,18 +634,19 @@ static int
ltq_etop_stop(struct net_device *dev)
{
struct ltq_etop_priv *priv = netdev_priv(dev);
@ -625,7 +643,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
return 0;
}
@@ -457,15 +651,16 @@ ltq_etop_tx(struct sk_buff *skb, struct
@@ -476,15 +656,16 @@ ltq_etop_tx(struct sk_buff *skb, struct
int queue = skb_get_queue_mapping(skb);
struct netdev_queue *txq = netdev_get_tx_queue(dev, queue);
struct ltq_etop_priv *priv = netdev_priv(dev);
@ -646,16 +664,16 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
netdev_err(dev, "tx ring full\n");
netif_tx_stop_queue(txq);
return NETDEV_TX_BUSY;
@@ -473,7 +668,7 @@ ltq_etop_tx(struct sk_buff *skb, struct
@@ -492,7 +673,7 @@ ltq_etop_tx(struct sk_buff *skb, struct
/* dma needs to start on a 16 byte aligned address */
byte_offset = CPHYSADDR(skb->data) % 16;
/* dma needs to start on a burst length value aligned address */
byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4);
- ch->skb[ch->dma.desc] = skb;
+ priv->txch.skb[priv->txch.dma.desc] = skb;
netif_trans_update(dev);
@@ -483,11 +678,11 @@ ltq_etop_tx(struct sk_buff *skb, struct
@@ -503,11 +684,11 @@ ltq_etop_tx(struct sk_buff *skb, struct
wmb();
desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP |
LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK);
@ -670,7 +688,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
netif_tx_stop_queue(txq);
return NETDEV_TX_OK;
@@ -498,11 +693,14 @@ ltq_etop_change_mtu(struct net_device *d
@@ -518,11 +699,14 @@ ltq_etop_change_mtu(struct net_device *d
{
struct ltq_etop_priv *priv = netdev_priv(dev);
unsigned long flags;
@ -686,7 +704,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
@@ -555,6 +753,9 @@ ltq_etop_init(struct net_device *dev)
@@ -575,6 +759,9 @@ ltq_etop_init(struct net_device *dev)
if (err)
goto err_hw;
ltq_etop_change_mtu(dev, 1500);
@ -696,7 +714,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
if (!is_valid_ether_addr(mac.sa_data)) {
@@ -572,9 +773,10 @@ ltq_etop_init(struct net_device *dev)
@@ -592,9 +779,10 @@ ltq_etop_init(struct net_device *dev)
dev->addr_assign_type = NET_ADDR_RANDOM;
ltq_etop_set_multicast_list(dev);
@ -710,7 +728,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
return 0;
err_netdev:
@@ -594,6 +796,9 @@ ltq_etop_tx_timeout(struct net_device *d
@@ -614,6 +802,9 @@ ltq_etop_tx_timeout(struct net_device *d
err = ltq_etop_hw_init(dev);
if (err)
goto err_hw;
@ -720,7 +738,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
netif_trans_update(dev);
netif_wake_queue(dev);
return;
@@ -617,14 +822,18 @@ static const struct net_device_ops ltq_e
@@ -637,14 +828,18 @@ static const struct net_device_ops ltq_e
.ndo_tx_timeout = ltq_etop_tx_timeout,
};
@ -743,7 +761,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
@@ -650,31 +859,62 @@ ltq_etop_probe(struct platform_device *p
@@ -670,19 +865,55 @@ ltq_etop_probe(struct platform_device *p
goto err_out;
}
@ -805,23 +823,27 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
spin_lock_init(&priv->lock);
SET_NETDEV_DEV(dev, &pdev->dev);
@@ -698,15 +929,10 @@ ltq_etop_probe(struct platform_device *p
goto err_free;
}
- for (i = 0; i < MAX_DMA_CHAN; i++) {
- if (IS_TX(i))
- netif_napi_add(dev, &priv->ch[i].napi,
- ltq_etop_poll_tx, 8);
- netif_napi_add_weight(dev, &priv->ch[i].napi,
- ltq_etop_poll_tx, 8);
- else if (IS_RX(i))
- netif_napi_add(dev, &priv->ch[i].napi,
- ltq_etop_poll_rx, 32);
- netif_napi_add_weight(dev, &priv->ch[i].napi,
- ltq_etop_poll_rx, 32);
- priv->ch[i].netdev = dev;
- }
+ netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8);
+ netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32);
+ netif_napi_add_weight(dev, &priv->txch.napi, ltq_etop_poll_tx, 8);
+ netif_napi_add_weight(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32);
+ priv->txch.netdev = dev;
+ priv->rxch.netdev = dev;
err = register_netdev(dev);
if (err)
@@ -703,31 +943,22 @@ ltq_etop_remove(struct platform_device *
@@ -735,31 +961,22 @@ ltq_etop_remove(struct platform_device *
return 0;
}
@ -840,7 +862,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
},
};
-int __init
-static int __init
-init_ltq_etop(void)
-{
- int ret = platform_driver_probe(&ltq_mii_driver, ltq_etop_probe);

View File

@ -18,9 +18,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -757,6 +757,16 @@ config I2C_MESON
If you say yes to this option, support will be included for the
I2C interface on the Amlogic Meson family of SoCs.
@@ -795,6 +795,16 @@ config I2C_MICROCHIP_CORE
This driver can also be built as a module. If so, the module will be
called i2c-microchip-core.
+config I2C_LANTIQ
+ tristate "Lantiq I2C interface"
@ -37,14 +37,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
depends on PPC
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-l
@@ -76,6 +76,7 @@ obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-l
obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
obj-$(CONFIG_I2C_JZ4780) += i2c-jz4780.o
obj-$(CONFIG_I2C_KEMPLD) += i2c-kempld.o
+obj-$(CONFIG_I2C_LANTIQ) += i2c-lantiq.o
obj-$(CONFIG_I2C_LPC2K) += i2c-lpc2k.o
obj-$(CONFIG_I2C_MESON) += i2c-meson.o
obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
obj-$(CONFIG_I2C_MICROCHIP_CORE) += i2c-microchip-corei2c.o
--- /dev/null
+++ b/drivers/i2c/busses/i2c-lantiq.c
@@ -0,0 +1,747 @@

View File

@ -203,7 +203,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+early_param("ethaddr", setup_ethaddr);
--- a/drivers/net/ethernet/lantiq_etop.c
+++ b/drivers/net/ethernet/lantiq_etop.c
@@ -757,7 +757,11 @@ ltq_etop_init(struct net_device *dev)
@@ -763,7 +763,11 @@ ltq_etop_init(struct net_device *dev)
if (err)
goto err_hw;

View File

@ -23,7 +23,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -93,7 +93,14 @@ static void dwc2_set_rk_params(struct dw
@@ -115,7 +115,15 @@ static void dwc2_set_rk_params(struct dw
p->power_down = DWC2_POWER_DOWN_PARAM_NONE;
}
@ -32,14 +32,15 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+{
+ struct dwc2_core_params *p = &hsotg->params;
+
+ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
+ p->otg_caps.hnp_support = false;
+ p->otg_caps.srp_support = false;
+}
+
+static void dwc2_set_ltq_ase_params(struct dwc2_hsotg *hsotg)
{
struct dwc2_core_params *p = &hsotg->params;
@@ -101,12 +108,20 @@ static void dwc2_set_ltq_params(struct d
@@ -124,12 +132,21 @@ static void dwc2_set_ltq_params(struct d
p->host_rx_fifo_size = 288;
p->host_nperio_tx_fifo_size = 128;
p->host_perio_tx_fifo_size = 96;
@ -53,7 +54,8 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+{
+ struct dwc2_core_params *p = &hsotg->params;
+
+ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
+ p->otg_caps.hnp_support = false;
+ p->otg_caps.srp_support = false;
+ p->host_rx_fifo_size = 288;
+ p->host_nperio_tx_fifo_size = 128;
+ p->host_perio_tx_fifo_size = 136;
@ -62,9 +64,9 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg)
{
struct dwc2_core_params *p = &hsotg->params;
@@ -205,8 +220,11 @@ const struct of_device_id dwc2_of_match_
{ .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
{ .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
@@ -241,8 +258,11 @@ const struct of_device_id dwc2_of_match_
{ .compatible = "ingenic,x1830-otg", .data = dwc2_set_x1600_params },
{ .compatible = "ingenic,x2000-otg", .data = dwc2_set_x2000_params },
{ .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params },
- { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params },
- { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params },

View File

@ -41,7 +41,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
/* the pci enable helper */
static int pci_enable(struct clk *clk)
{
@@ -585,4 +604,5 @@ void __init ltq_soc_init(void)
@@ -589,4 +608,5 @@ void __init ltq_soc_init(void)
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
}

View File

@ -69,7 +69,7 @@ Signed-off-by: Mathias Kresin <openwrt@kresin.me>
return -ENOMEM;
i = 0;
@@ -147,6 +183,11 @@ static int parse_fixed_partitions(struct
@@ -166,6 +202,11 @@ static int parse_fixed_partitions(struct
if (of_property_read_bool(pp, "slc-mode"))
parts[i].add_flags |= MTD_SLC_ON_MLC_EMULATION;
@ -81,7 +81,7 @@ Signed-off-by: Mathias Kresin <openwrt@kresin.me>
i++;
}
@@ -156,6 +197,11 @@ static int parse_fixed_partitions(struct
@@ -175,6 +216,11 @@ static int parse_fixed_partitions(struct
if (quirks && quirks->post_parse)
quirks->post_parse(master, parts, nr_parts);
@ -93,7 +93,7 @@ Signed-off-by: Mathias Kresin <openwrt@kresin.me>
*pparts = parts;
return nr_parts;
@@ -166,6 +212,7 @@ ofpart_fail:
@@ -185,6 +231,7 @@ ofpart_fail:
ofpart_none:
of_node_put(pp);
kfree(parts);

View File

@ -12,15 +12,15 @@ Signed-off-by: Eddi De Pieri <eddi@depieri.net>
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -43,7 +43,7 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
@@ -41,7 +41,7 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o
obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
-obj-$(CONFIG_PCIE_LANTIQ) += ifxmips_pcie_phy.o ifxmips_pcie.o fixup-lantiq-pcie.o
+obj-$(CONFIG_PCIE_LANTIQ) += ifxmips_pcie.o fixup-lantiq-pcie.o
obj-$(CONFIG_PCIE_LANTIQ_MSI) += pcie-lantiq-msi.o
obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
--- a/arch/mips/pci/ifxmips_pcie.c
+++ b/arch/mips/pci/ifxmips_pcie.c
@@ -16,8 +16,15 @@

View File

@ -15,7 +15,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2433,6 +2433,12 @@ config MIPS_VPE_LOADER
@@ -2306,6 +2306,12 @@ config MIPS_VPE_LOADER
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
@ -30,7 +30,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
default "y"
--- a/arch/mips/include/asm/mipsmtregs.h
+++ b/arch/mips/include/asm/mipsmtregs.h
@@ -32,6 +32,9 @@
@@ -31,6 +31,9 @@
#define read_c0_vpeconf1() __read_32bit_c0_register($1, 3)
#define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val)
@ -40,7 +40,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
#define read_c0_tcstatus() __read_32bit_c0_register($2, 1)
#define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val)
@@ -378,6 +381,8 @@ do { \
@@ -377,6 +380,8 @@ do { \
#define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val)
#define read_vpe_c0_vpeconf1() mftc0(1, 3)
#define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val)
@ -51,7 +51,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
#define read_vpe_c0_status() mftc0(12, 0)
--- a/arch/mips/include/asm/vpe.h
+++ b/arch/mips/include/asm/vpe.h
@@ -123,4 +123,13 @@ void cleanup_tc(struct tc *tc);
@@ -124,4 +124,13 @@ void cleanup_tc(struct tc *tc);
int __init vpe_module_init(void);
void __exit vpe_module_exit(void);
@ -67,7 +67,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
#endif /* _ASM_VPE_H */
--- a/arch/mips/kernel/vpe-mt.c
+++ b/arch/mips/kernel/vpe-mt.c
@@ -415,6 +415,8 @@ int __init vpe_module_init(void)
@@ -416,6 +416,8 @@ int __init vpe_module_init(void)
}
v->ntcs = hw_tcs - aprp_cpu_index();
@ -76,7 +76,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
/* add the tc to the list of this vpe's tc's. */
list_add(&t->tc, &v->tc);
@@ -518,3 +520,47 @@ void __exit vpe_module_exit(void)
@@ -519,3 +521,47 @@ void __exit vpe_module_exit(void)
release_vpe(v);
}
}
@ -170,9 +170,9 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
{
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -28,10 +28,14 @@ EXPORT_SYMBOL_GPL(ebu_lock);
*/
static struct ltq_soc_info soc_info;
@@ -42,10 +42,14 @@ extern const struct plat_smp_ops vsmp_sm
static struct plat_smp_ops lantiq_smp_ops;
#endif
+/* for Multithreading (APRP), vpe.c will use it */
+unsigned long cp0_memsize;

View File

@ -10,7 +10,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
--- a/arch/mips/kernel/vpe-mt.c
+++ b/arch/mips/kernel/vpe-mt.c
@@ -130,7 +130,10 @@ int vpe_run(struct vpe *v)
@@ -131,7 +131,10 @@ int vpe_run(struct vpe *v)
* kernels need to turn it on, even if that wasn't the pre-dvpe() state.
*/
#ifdef CONFIG_SMP

View File

@ -31,7 +31,7 @@ Signed-off-by: Mathias Kresin <openwrt@kresin.me>
/* bring up all register ranges that we need for basic system control */
void __init ltq_soc_init(void)
{
@@ -605,4 +619,6 @@ void __init ltq_soc_init(void)
@@ -609,4 +623,6 @@ void __init ltq_soc_init(void)
clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
}
usb_set_clock();

View File

@ -1,86 +0,0 @@
From 49293bbc50cb7d44223eb49e0f7cb38e7dac2361 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Tue, 14 Sep 2021 23:21:01 +0200
Subject: [PATCH 4/5] MIPS: lantiq: dma: make the burst length configurable by
the drivers
Make the burst length configurable by the drivers.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
.../include/asm/mach-lantiq/xway/xway_dma.h | 2 +-
arch/mips/lantiq/xway/dma.c | 38 ++++++++++++++++---
2 files changed, 34 insertions(+), 6 deletions(-)
--- a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
@@ -45,6 +45,6 @@ extern void ltq_dma_close(struct ltq_dma
extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
extern void ltq_dma_free(struct ltq_dma_channel *ch);
-extern void ltq_dma_init_port(int p);
+extern void ltq_dma_init_port(int p, int tx_burst, int rx_burst);
#endif
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -182,7 +182,7 @@ ltq_dma_free(struct ltq_dma_channel *ch)
EXPORT_SYMBOL_GPL(ltq_dma_free);
void
-ltq_dma_init_port(int p)
+ltq_dma_init_port(int p, int tx_burst, int rx_burst)
{
ltq_dma_w32(p, LTQ_DMA_PS);
switch (p) {
@@ -191,16 +191,44 @@ ltq_dma_init_port(int p)
* Tell the DMA engine to swap the endianness of data frames and
* drop packets if the channel arbitration fails.
*/
- ltq_dma_w32_mask(0, DMA_ETOP_ENDIANNESS | DMA_PDEN,
+ ltq_dma_w32_mask(0, (DMA_ETOP_ENDIANNESS | DMA_PDEN),
LTQ_DMA_PCTRL);
break;
- case DMA_PORT_DEU:
- ltq_dma_w32((DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT) |
- (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
+ default:
+ break;
+ }
+
+ switch (rx_burst) {
+ case 8:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_8W_BURST << DMA_RX_BURST_SHIFT),
LTQ_DMA_PCTRL);
break;
+ case 4:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_4W_BURST << DMA_RX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 2:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ default:
+ break;
+ }
+ switch (tx_burst) {
+ case 8:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_8W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 4:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_4W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 2:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
default:
break;
}

View File

@ -1,87 +0,0 @@
From 730320fd770d4114a2ecb6fb223dcc8c3cecdc5b Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Wed, 21 Sep 2022 22:59:44 +0200
Subject: [PATCH] MIPS: lantiq: enable all hardware interrupts on second VPE
This patch is needed to handle interrupts by the second VPE on the Lantiq
ARX100, xRX200, xRX300 and xRX330 SoCs. Switching some ICU interrupts to
the second VPE results in a hang. Currently, the vsmp_init_secondary()
function is responsible for enabling these interrupts. It only enables
Malta-specific interrupts (SW0, SW1, HW4 and HW5).
The MIPS core has 8 interrupts defined. On Lantiq SoCs, hardware
interrupts are wired to an ICU instance. Each VPE has an independent
instance of the ICU. The mapping of the ICU interrupts is shown below:
SW0(IP0) - IPI call,
SW1(IP1) - IPI resched,
HW0(IP2) - ICU 0-31,
HW1(IP3) - ICU 32-63,
HW2(IP4) - ICU 64-95,
HW3(IP5) - ICU 96-127,
HW4(IP6) - ICU 128-159,
HW5(IP7) - timer.
This patch enables all interrupt lines on the second VPE.
This problem affects multithreaded SoCs with a custom interrupt controller.
SOCs with 1004Kc core and newer use the MIPS GIC. At this point, I am aware
that the Realtek RTL839x and RTL930x SoCs may need a similar fix. In the
future, this may be replaced with some generic solution.
Tested on Lantiq xRX200.
Suggested-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/lantiq/prom.c | 26 ++++++++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -31,6 +31,14 @@ static struct ltq_soc_info soc_info;
/* for Multithreading (APRP), vpe.c will use it */
unsigned long cp0_memsize;
+/*
+ * These structs are used to override vsmp_init_secondary()
+ */
+#if defined(CONFIG_MIPS_MT_SMP)
+extern const struct plat_smp_ops vsmp_smp_ops;
+static struct plat_smp_ops lantiq_smp_ops;
+#endif
+
const char *get_system_type(void)
{
return soc_info.sys_type;
@@ -87,6 +95,17 @@ void __init device_tree_init(void)
unflatten_and_copy_device_tree();
}
+#if defined(CONFIG_MIPS_MT_SMP)
+static void lantiq_init_secondary(void)
+{
+ /*
+ * MIPS CPU startup function vsmp_init_secondary() will only
+ * enable some of the interrupts for the second CPU/VPE.
+ */
+ set_c0_status(ST0_IM);
+}
+#endif
+
void __init prom_init(void)
{
/* call the soc specific detetcion code and get it to fill soc_info */
@@ -98,7 +117,10 @@ void __init prom_init(void)
prom_init_cmdline();
#if defined(CONFIG_MIPS_MT_SMP)
- if (register_vsmp_smp_ops())
- panic("failed to register_vsmp_smp_ops()");
+ if (cpu_has_mipsmt) {
+ lantiq_smp_ops = vsmp_smp_ops;
+ lantiq_smp_ops.init_secondary = lantiq_init_secondary;
+ register_smp_ops(&lantiq_smp_ops);
+ }
#endif
}

View File

@ -1,34 +0,0 @@
From 4bf2a626dc4bb46f0754d8ac02ec8584ff114ad5 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Mon, 22 Jan 2024 19:47:09 +0100
Subject: [PATCH] MIPS: lantiq: register smp_ops on non-smp platforms
Lantiq uses a common kernel config for devices with 24Kc and 34Kc cores.
The changes made previously to add support for interrupts on all cores
work on 24Kc platforms with SMP disabled and 34Kc platforms with SMP
enabled. This patch fixes boot issues on Danube (single core 24Kc) with
SMP enabled.
Fixes: 730320fd770d ("MIPS: lantiq: enable all hardware interrupts on second VPE")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/lantiq/prom.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -117,10 +117,9 @@ void __init prom_init(void)
prom_init_cmdline();
#if defined(CONFIG_MIPS_MT_SMP)
- if (cpu_has_mipsmt) {
- lantiq_smp_ops = vsmp_smp_ops;
+ lantiq_smp_ops = vsmp_smp_ops;
+ if (cpu_has_mipsmt)
lantiq_smp_ops.init_secondary = lantiq_init_secondary;
- register_smp_ops(&lantiq_smp_ops);
- }
+ register_smp_ops(&lantiq_smp_ops);
#endif
}

View File

@ -10,7 +10,7 @@ Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
--- a/drivers/net/ethernet/lantiq_etop.c
+++ b/drivers/net/ethernet/lantiq_etop.c
@@ -30,6 +30,7 @@
@@ -31,6 +31,7 @@
#include <linux/of_net.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
@ -18,7 +18,7 @@ Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
#include <asm/checksum.h>
@@ -553,7 +554,8 @@ static int
@@ -558,7 +559,8 @@ static int
ltq_etop_mdio_init(struct net_device *dev)
{
struct ltq_etop_priv *priv = netdev_priv(dev);
@ -28,10 +28,10 @@ Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
priv->mii_bus = mdiobus_alloc();
if (!priv->mii_bus) {
@@ -573,7 +575,15 @@ ltq_etop_mdio_init(struct net_device *de
@@ -578,7 +580,15 @@ ltq_etop_mdio_init(struct net_device *de
priv->mii_bus->name = "ltq_mii";
snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
priv->pdev->name, priv->pdev->id);
priv->pdev->name, priv->pdev->id);
- if (mdiobus_register(priv->mii_bus)) {
+
+ mdio_np = of_get_child_by_name(priv->pdev->dev.of_node, "mdio-bus");

View File

@ -1,145 +0,0 @@
From 998ac358019e491217e752bc6dcbb3afb2a6fa3e Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sun, 19 Sep 2021 20:24:28 +0200
Subject: [PATCH] net: lantiq: add support for jumbo frames
Add support for jumbo frames. Full support for jumbo frames requires
changes in the DSA switch driver (lantiq_gswip.c).
Tested on BT Hone Hub 5A.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/lantiq_xrx200.c | 64 +++++++++++++++++++++++++---
1 file changed, 57 insertions(+), 7 deletions(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -14,13 +14,15 @@
#include <linux/clk.h>
#include <linux/delay.h>
+#include <linux/if_vlan.h>
+
#include <linux/of_net.h>
#include <linux/of_platform.h>
#include <xway_dma.h>
/* DMA */
-#define XRX200_DMA_DATA_LEN 0x600
+#define XRX200_DMA_DATA_LEN (SZ_64K - 1)
#define XRX200_DMA_RX 0
#define XRX200_DMA_TX 1
@@ -106,7 +108,8 @@ static void xrx200_flush_dma(struct xrx2
break;
desc->ctl = LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) |
- XRX200_DMA_DATA_LEN;
+ (ch->priv->net_dev->mtu + VLAN_ETH_HLEN +
+ ETH_FCS_LEN);
ch->dma.desc++;
ch->dma.desc %= LTQ_DESC_NUM;
}
@@ -154,19 +157,20 @@ static int xrx200_close(struct net_devic
static int xrx200_alloc_skb(struct xrx200_chan *ch)
{
+ int len = ch->priv->net_dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
struct sk_buff *skb = ch->skb[ch->dma.desc];
dma_addr_t mapping;
int ret = 0;
ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(ch->priv->net_dev,
- XRX200_DMA_DATA_LEN);
+ len);
if (!ch->skb[ch->dma.desc]) {
ret = -ENOMEM;
goto skip;
}
mapping = dma_map_single(ch->priv->dev, ch->skb[ch->dma.desc]->data,
- XRX200_DMA_DATA_LEN, DMA_FROM_DEVICE);
+ len, DMA_FROM_DEVICE);
if (unlikely(dma_mapping_error(ch->priv->dev, mapping))) {
dev_kfree_skb_any(ch->skb[ch->dma.desc]);
ch->skb[ch->dma.desc] = skb;
@@ -179,8 +183,7 @@ static int xrx200_alloc_skb(struct xrx20
wmb();
skip:
ch->dma.desc_base[ch->dma.desc].ctl =
- LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) |
- XRX200_DMA_DATA_LEN;
+ LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | len;
return ret;
}
@@ -340,10 +343,57 @@ err_drop:
return NETDEV_TX_OK;
}
+static int
+xrx200_change_mtu(struct net_device *net_dev, int new_mtu)
+{
+ struct xrx200_priv *priv = netdev_priv(net_dev);
+ struct xrx200_chan *ch_rx = &priv->chan_rx;
+ int old_mtu = net_dev->mtu;
+ bool running = false;
+ struct sk_buff *skb;
+ int curr_desc;
+ int ret = 0;
+
+ net_dev->mtu = new_mtu;
+
+ if (new_mtu <= old_mtu)
+ return ret;
+
+ running = netif_running(net_dev);
+ if (running) {
+ napi_disable(&ch_rx->napi);
+ ltq_dma_close(&ch_rx->dma);
+ }
+
+ xrx200_poll_rx(&ch_rx->napi, LTQ_DESC_NUM);
+ curr_desc = ch_rx->dma.desc;
+
+ for (ch_rx->dma.desc = 0; ch_rx->dma.desc < LTQ_DESC_NUM;
+ ch_rx->dma.desc++) {
+ skb = ch_rx->skb[ch_rx->dma.desc];
+ ret = xrx200_alloc_skb(ch_rx);
+ if (ret) {
+ net_dev->mtu = old_mtu;
+ break;
+ }
+ dev_kfree_skb_any(skb);
+ }
+
+ ch_rx->dma.desc = curr_desc;
+ if (running) {
+ napi_enable(&ch_rx->napi);
+ ltq_dma_open(&ch_rx->dma);
+ ltq_dma_enable_irq(&ch_rx->dma);
+ }
+
+ return ret;
+}
+
static const struct net_device_ops xrx200_netdev_ops = {
.ndo_open = xrx200_open,
.ndo_stop = xrx200_close,
.ndo_start_xmit = xrx200_start_xmit,
+ .ndo_change_mtu = xrx200_change_mtu,
.ndo_set_mac_address = eth_mac_addr,
.ndo_validate_addr = eth_validate_addr,
};
@@ -453,7 +503,7 @@ static int xrx200_probe(struct platform_
net_dev->netdev_ops = &xrx200_netdev_ops;
SET_NETDEV_DEV(net_dev, dev);
net_dev->min_mtu = ETH_ZLEN;
- net_dev->max_mtu = XRX200_DMA_DATA_LEN;
+ net_dev->max_mtu = XRX200_DMA_DATA_LEN - VLAN_ETH_HLEN - ETH_FCS_LEN;
/* load the memory ranges */
priv->pmac_reg = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);

View File

@ -1,122 +0,0 @@
From 1488fc204568f707fe2a42a913788c00a95af30e Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Fri, 17 Dec 2021 01:07:40 +0100
Subject: [PATCH] net: lantiq_xrx200: increase buffer reservation
If the user sets a lower mtu on the CPU port than on the switch,
then DMA inserts a few more bytes into the buffer than expected.
In the worst case, it may exceed the size of the buffer. The
experiments showed that the buffer should be a multiple of the
burst length value. This patch rounds the length of the rx buffer
upwards and fixes this bug. The reservation of FCS space in the
buffer has been removed as PMAC strips the FCS.
Fixes: 998ac358019e ("net: lantiq: add support for jumbo frames")
Reported-by: Thomas Nixon <tom@tomn.co.uk>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/lantiq_xrx200.c | 34 ++++++++++++++++++++--------
1 file changed, 24 insertions(+), 10 deletions(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -70,6 +70,8 @@ struct xrx200_priv {
struct xrx200_chan chan_tx;
struct xrx200_chan chan_rx;
+ u16 rx_buf_size;
+
struct net_device *net_dev;
struct device *dev;
@@ -96,6 +98,16 @@ static void xrx200_pmac_mask(struct xrx2
xrx200_pmac_w32(priv, val, offset);
}
+static int xrx200_max_frame_len(int mtu)
+{
+ return VLAN_ETH_HLEN + mtu;
+}
+
+static int xrx200_buffer_size(int mtu)
+{
+ return round_up(xrx200_max_frame_len(mtu), 4 * XRX200_DMA_BURST_LEN);
+}
+
/* drop all the packets from the DMA ring */
static void xrx200_flush_dma(struct xrx200_chan *ch)
{
@@ -108,8 +120,7 @@ static void xrx200_flush_dma(struct xrx2
break;
desc->ctl = LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) |
- (ch->priv->net_dev->mtu + VLAN_ETH_HLEN +
- ETH_FCS_LEN);
+ ch->priv->rx_buf_size;
ch->dma.desc++;
ch->dma.desc %= LTQ_DESC_NUM;
}
@@ -157,21 +168,21 @@ static int xrx200_close(struct net_devic
static int xrx200_alloc_skb(struct xrx200_chan *ch)
{
- int len = ch->priv->net_dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
struct sk_buff *skb = ch->skb[ch->dma.desc];
+ struct xrx200_priv *priv = ch->priv;
dma_addr_t mapping;
int ret = 0;
- ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(ch->priv->net_dev,
- len);
+ ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(priv->net_dev,
+ priv->rx_buf_size);
if (!ch->skb[ch->dma.desc]) {
ret = -ENOMEM;
goto skip;
}
- mapping = dma_map_single(ch->priv->dev, ch->skb[ch->dma.desc]->data,
- len, DMA_FROM_DEVICE);
- if (unlikely(dma_mapping_error(ch->priv->dev, mapping))) {
+ mapping = dma_map_single(priv->dev, ch->skb[ch->dma.desc]->data,
+ priv->rx_buf_size, DMA_FROM_DEVICE);
+ if (unlikely(dma_mapping_error(priv->dev, mapping))) {
dev_kfree_skb_any(ch->skb[ch->dma.desc]);
ch->skb[ch->dma.desc] = skb;
ret = -ENOMEM;
@@ -183,7 +194,7 @@ static int xrx200_alloc_skb(struct xrx20
wmb();
skip:
ch->dma.desc_base[ch->dma.desc].ctl =
- LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | len;
+ LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | priv->rx_buf_size;
return ret;
}
@@ -355,6 +366,7 @@ xrx200_change_mtu(struct net_device *net
int ret = 0;
net_dev->mtu = new_mtu;
+ priv->rx_buf_size = xrx200_buffer_size(new_mtu);
if (new_mtu <= old_mtu)
return ret;
@@ -374,6 +386,7 @@ xrx200_change_mtu(struct net_device *net
ret = xrx200_alloc_skb(ch_rx);
if (ret) {
net_dev->mtu = old_mtu;
+ priv->rx_buf_size = xrx200_buffer_size(old_mtu);
break;
}
dev_kfree_skb_any(skb);
@@ -503,7 +516,8 @@ static int xrx200_probe(struct platform_
net_dev->netdev_ops = &xrx200_netdev_ops;
SET_NETDEV_DEV(net_dev, dev);
net_dev->min_mtu = ETH_ZLEN;
- net_dev->max_mtu = XRX200_DMA_DATA_LEN - VLAN_ETH_HLEN - ETH_FCS_LEN;
+ net_dev->max_mtu = XRX200_DMA_DATA_LEN - xrx200_max_frame_len(0);
+ priv->rx_buf_size = xrx200_buffer_size(ETH_DATA_LEN);
/* load the memory ranges */
priv->pmac_reg = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);

View File

@ -1,104 +0,0 @@
From c3e6b2c35b34214c58c1e90d65dab5f5393608e7 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Mon, 3 Jan 2022 20:43:16 +0100
Subject: [PATCH] net: lantiq_xrx200: add ingress SG DMA support
This patch adds support for scatter gather DMA. DMA in PMAC splits
the packet into several buffers when the MTU on the CPU port is
less than the MTU of the switch. The first buffer starts at an
offset of NET_IP_ALIGN. In subsequent buffers, dma ignores the
offset. Thanks to this patch, the user can still connect to the
device in such a situation. For normal configurations, the patch
has no effect on performance.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/lantiq_xrx200.c | 47 +++++++++++++++++++++++-----
1 file changed, 40 insertions(+), 7 deletions(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -26,6 +26,9 @@
#define XRX200_DMA_RX 0
#define XRX200_DMA_TX 1
+#define XRX200_DMA_PACKET_COMPLETE 0
+#define XRX200_DMA_PACKET_IN_PROGRESS 1
+
/* cpu port mac */
#define PMAC_RX_IPG 0x0024
#define PMAC_RX_IPG_MASK 0xf
@@ -61,6 +64,9 @@ struct xrx200_chan {
struct ltq_dma_channel dma;
struct sk_buff *skb[LTQ_DESC_NUM];
+ struct sk_buff *skb_head;
+ struct sk_buff *skb_tail;
+
struct xrx200_priv *priv;
};
@@ -204,7 +210,8 @@ static int xrx200_hw_receive(struct xrx2
struct xrx200_priv *priv = ch->priv;
struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
struct sk_buff *skb = ch->skb[ch->dma.desc];
- int len = (desc->ctl & LTQ_DMA_SIZE_MASK);
+ u32 ctl = desc->ctl;
+ int len = (ctl & LTQ_DMA_SIZE_MASK);
struct net_device *net_dev = priv->net_dev;
int ret;
@@ -220,12 +227,36 @@ static int xrx200_hw_receive(struct xrx2
}
skb_put(skb, len);
- skb->protocol = eth_type_trans(skb, net_dev);
- netif_receive_skb(skb);
- net_dev->stats.rx_packets++;
- net_dev->stats.rx_bytes += len;
- return 0;
+ /* add buffers to skb via skb->frag_list */
+ if (ctl & LTQ_DMA_SOP) {
+ ch->skb_head = skb;
+ ch->skb_tail = skb;
+ } else if (ch->skb_head) {
+ if (ch->skb_head == ch->skb_tail)
+ skb_shinfo(ch->skb_tail)->frag_list = skb;
+ else
+ ch->skb_tail->next = skb;
+ ch->skb_tail = skb;
+ skb_reserve(ch->skb_tail, -NET_IP_ALIGN);
+ ch->skb_head->len += skb->len;
+ ch->skb_head->data_len += skb->len;
+ ch->skb_head->truesize += skb->truesize;
+ }
+
+ if (ctl & LTQ_DMA_EOP) {
+ ch->skb_head->protocol = eth_type_trans(ch->skb_head, net_dev);
+ netif_receive_skb(ch->skb_head);
+ net_dev->stats.rx_packets++;
+ net_dev->stats.rx_bytes += ch->skb_head->len;
+ ch->skb_head = NULL;
+ ch->skb_tail = NULL;
+ ret = XRX200_DMA_PACKET_COMPLETE;
+ } else {
+ ret = XRX200_DMA_PACKET_IN_PROGRESS;
+ }
+
+ return ret;
}
static int xrx200_poll_rx(struct napi_struct *napi, int budget)
@@ -240,7 +271,9 @@ static int xrx200_poll_rx(struct napi_st
if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
ret = xrx200_hw_receive(ch);
- if (ret)
+ if (ret == XRX200_DMA_PACKET_IN_PROGRESS)
+ continue;
+ if (ret != XRX200_DMA_PACKET_COMPLETE)
return ret;
rx++;
} else {

View File

@ -1,127 +0,0 @@
From c40bb4fedcd6b8b6a714da5dd466eb88ed2652d1 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Wed, 9 Mar 2022 00:04:57 +0100
Subject: net: dsa: lantiq_gswip: enable jumbo frames on GSWIP
This enables non-standard MTUs on a per-port basis, with the overall
frame size set based on the CPU port.
When the MTU is not changed, this should have no effect.
Long packets crash the switch with MTUs of greater than 2526, so the
maximum is limited for now. Medium packets are sometimes dropped (e.g.
TCP over 2477, UDP over 2516-2519, ICMP over 2526), Hence an MTU value
of 2400 seems safe.
Signed-off-by: Thomas Nixon <tom@tomn.co.uk>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://lore.kernel.org/r/20220308230457.1599237-1-olek2@wp.pl
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/dsa/lantiq_gswip.c | 53 ++++++++++++++++++++++++++++++++++++++----
1 file changed, 49 insertions(+), 4 deletions(-)
--- a/drivers/net/dsa/lantiq_gswip.c
+++ b/drivers/net/dsa/lantiq_gswip.c
@@ -213,6 +213,7 @@
#define GSWIP_MAC_CTRL_0_GMII_MII 0x0001
#define GSWIP_MAC_CTRL_0_GMII_RGMII 0x0002
#define GSWIP_MAC_CTRL_2p(p) (0x905 + ((p) * 0xC))
+#define GSWIP_MAC_CTRL_2_LCHKL BIT(2) /* Frame Length Check Long Enable */
#define GSWIP_MAC_CTRL_2_MLEN BIT(3) /* Maximum Untagged Frame Lnegth */
/* Ethernet Switch Fetch DMA Port Control Register */
@@ -239,6 +240,15 @@
#define XRX200_GPHY_FW_ALIGN (16 * 1024)
+/* Maximum packet size supported by the switch. In theory this should be 10240,
+ * but long packets currently cause lock-ups with an MTU of over 2526. Medium
+ * packets are sometimes dropped (e.g. TCP over 2477, UDP over 2516-2519, ICMP
+ * over 2526), hence an MTU value of 2400 seems safe. This issue only affects
+ * packet reception. This is probably caused by the PPA engine, which is on the
+ * RX part of the device. Packet transmission works properly up to 10240.
+ */
+#define GSWIP_MAX_PACKET_LENGTH 2400
+
struct gswip_hw_info {
int max_ports;
int cpu_port;
@@ -846,10 +856,6 @@ static int gswip_setup(struct dsa_switch
gswip_switch_mask(priv, 0, GSWIP_PCE_PCTRL_0_INGRESS,
GSWIP_PCE_PCTRL_0p(cpu_port));
- gswip_switch_mask(priv, 0, GSWIP_MAC_CTRL_2_MLEN,
- GSWIP_MAC_CTRL_2p(cpu_port));
- gswip_switch_w(priv, VLAN_ETH_FRAME_LEN + 8 + ETH_FCS_LEN,
- GSWIP_MAC_FLEN);
gswip_switch_mask(priv, 0, GSWIP_BM_QUEUE_GCTRL_GL_MOD,
GSWIP_BM_QUEUE_GCTRL);
@@ -866,6 +872,8 @@ static int gswip_setup(struct dsa_switch
return err;
}
+ ds->mtu_enforcement_ingress = true;
+
gswip_port_enable(ds, cpu_port, NULL);
ds->configure_vlan_while_not_filtering = false;
@@ -1456,6 +1464,39 @@ static void gswip_phylink_set_capab(unsi
linkmode_and(state->advertising, state->advertising, mask);
}
+static int gswip_port_max_mtu(struct dsa_switch *ds, int port)
+{
+ /* Includes 8 bytes for special header. */
+ return GSWIP_MAX_PACKET_LENGTH - VLAN_ETH_HLEN - ETH_FCS_LEN;
+}
+
+static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
+{
+ struct gswip_priv *priv = ds->priv;
+ int cpu_port = priv->hw_info->cpu_port;
+
+ /* CPU port always has maximum mtu of user ports, so use it to set
+ * switch frame size, including 8 byte special header.
+ */
+ if (port == cpu_port) {
+ new_mtu += 8;
+ gswip_switch_w(priv, VLAN_ETH_HLEN + new_mtu + ETH_FCS_LEN,
+ GSWIP_MAC_FLEN);
+ }
+
+ /* Enable MLEN for ports with non-standard MTUs, including the special
+ * header on the CPU port added above.
+ */
+ if (new_mtu != ETH_DATA_LEN)
+ gswip_switch_mask(priv, 0, GSWIP_MAC_CTRL_2_MLEN,
+ GSWIP_MAC_CTRL_2p(port));
+ else
+ gswip_switch_mask(priv, GSWIP_MAC_CTRL_2_MLEN, 0,
+ GSWIP_MAC_CTRL_2p(port));
+
+ return 0;
+}
+
static void gswip_xrx200_phylink_validate(struct dsa_switch *ds, int port,
unsigned long *supported,
struct phylink_link_state *state)
@@ -1812,6 +1853,8 @@ static const struct dsa_switch_ops gswip
.port_fdb_add = gswip_port_fdb_add,
.port_fdb_del = gswip_port_fdb_del,
.port_fdb_dump = gswip_port_fdb_dump,
+ .port_change_mtu = gswip_port_change_mtu,
+ .port_max_mtu = gswip_port_max_mtu,
.phylink_validate = gswip_xrx200_phylink_validate,
.phylink_mac_config = gswip_phylink_mac_config,
.phylink_mac_link_down = gswip_phylink_mac_link_down,
@@ -1836,6 +1879,8 @@ static const struct dsa_switch_ops gswip
.port_fdb_add = gswip_port_fdb_add,
.port_fdb_del = gswip_port_fdb_del,
.port_fdb_dump = gswip_port_fdb_dump,
+ .port_change_mtu = gswip_port_change_mtu,
+ .port_max_mtu = gswip_port_max_mtu,
.phylink_validate = gswip_xrx300_phylink_validate,
.phylink_mac_config = gswip_phylink_mac_config,
.phylink_mac_link_down = gswip_phylink_mac_link_down,

View File

@ -1,126 +0,0 @@
From 14d4e308e0aa0b78dc7a059716861a4380de3535 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Tue, 14 Sep 2021 23:21:02 +0200
Subject: [PATCH 5/5] net: lantiq: configure the burst length in ethernet
drivers
Configure the burst length in Ethernet drivers. This improves
Ethernet performance by 58%. According to the vendor BSP,
8W burst length is supported by ar9 and newer SoCs.
The NAT benchmark results on xRX200 (Down/Up):
* 2W: 330 Mb/s
* 4W: 432 Mb/s 372 Mb/s
* 8W: 520 Mb/s 389 Mb/s
Tested on xRX200 and xRX330.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/lantiq_etop.c | 21 ++++++++++++++++++---
drivers/net/ethernet/lantiq_xrx200.c | 21 ++++++++++++++++++---
2 files changed, 36 insertions(+), 6 deletions(-)
--- a/drivers/net/ethernet/lantiq_etop.c
+++ b/drivers/net/ethernet/lantiq_etop.c
@@ -148,6 +148,9 @@ struct ltq_etop_priv {
struct ltq_etop_chan txch;
struct ltq_etop_chan rxch;
+ int tx_burst_len;
+ int rx_burst_len;
+
int tx_irq;
int rx_irq;
@@ -399,7 +402,7 @@ ltq_etop_dma_init(struct net_device *dev
int rx = priv->rx_irq - LTQ_DMA_ETOP;
int err;
- ltq_dma_init_port(DMA_PORT_ETOP);
+ ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
priv->txch.dma.nr = tx;
priv->txch.dma.dev = &priv->pdev->dev;
@@ -676,8 +679,8 @@ ltq_etop_tx(struct sk_buff *skb, struct
return NETDEV_TX_BUSY;
}
- /* dma needs to start on a 16 byte aligned address */
- byte_offset = CPHYSADDR(skb->data) % 16;
+ /* dma needs to start on a burst length value aligned address */
+ byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4);
priv->txch.skb[priv->txch.dma.desc] = skb;
netif_trans_update(dev);
@@ -925,6 +928,18 @@ static int ltq_etop_probe(struct platfor
spin_lock_init(&priv->lock);
SET_NETDEV_DEV(dev, &pdev->dev);
+ err = device_property_read_u32(&pdev->dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
+ if (err < 0) {
+ dev_err(&pdev->dev, "unable to read tx-burst-length property\n");
+ return err;
+ }
+
+ err = device_property_read_u32(&pdev->dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
+ if (err < 0) {
+ dev_err(&pdev->dev, "unable to read rx-burst-length property\n");
+ return err;
+ }
+
netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8);
netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32);
priv->txch.netdev = dev;
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -81,6 +81,9 @@ struct xrx200_priv {
struct net_device *net_dev;
struct device *dev;
+ int tx_burst_len;
+ int rx_burst_len;
+
__iomem void *pmac_reg;
};
@@ -363,8 +366,8 @@ static netdev_tx_t xrx200_start_xmit(str
if (unlikely(dma_mapping_error(priv->dev, mapping)))
goto err_drop;
- /* dma needs to start on a 16 byte aligned address */
- byte_offset = mapping % 16;
+ /* dma needs to start on a burst length value aligned address */
+ byte_offset = mapping % (priv->tx_burst_len * 4);
desc->addr = mapping - byte_offset;
/* Make sure the address is written before we give it to HW */
@@ -465,7 +468,7 @@ static int xrx200_dma_init(struct xrx200
int ret = 0;
int i;
- ltq_dma_init_port(DMA_PORT_ETOP);
+ ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
ch_rx->dma.nr = XRX200_DMA_RX;
ch_rx->dma.dev = priv->dev;
@@ -575,6 +578,18 @@ static int xrx200_probe(struct platform_
if (err)
eth_hw_addr_random(net_dev);
+ err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
+ if (err < 0) {
+ dev_err(dev, "unable to read tx-burst-length property\n");
+ return err;
+ }
+
+ err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
+ if (err < 0) {
+ dev_err(dev, "unable to read rx-burst-length property\n");
+ return err;
+ }
+
/* bring up the dma engine and IP core */
err = xrx200_dma_init(priv);
if (err)

View File

@ -1,73 +0,0 @@
From 7e553c44f09a8f536090904c6db5b8c9dbafa03b Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Tue, 26 Oct 2021 22:59:01 +0200
Subject: [PATCH] net: lantiq_xrx200: Hardcode the burst length value
All SoCs with this IP core support 8 burst length. Hauke
suggested to hardcode this value and simplify the driver.
Link: https://lkml.org/lkml/2021/9/14/1533
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/lantiq_xrx200.c | 21 ++++-----------------
1 file changed, 4 insertions(+), 17 deletions(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -25,6 +25,7 @@
#define XRX200_DMA_DATA_LEN (SZ_64K - 1)
#define XRX200_DMA_RX 0
#define XRX200_DMA_TX 1
+#define XRX200_DMA_BURST_LEN 8
#define XRX200_DMA_PACKET_COMPLETE 0
#define XRX200_DMA_PACKET_IN_PROGRESS 1
@@ -81,9 +82,6 @@ struct xrx200_priv {
struct net_device *net_dev;
struct device *dev;
- int tx_burst_len;
- int rx_burst_len;
-
__iomem void *pmac_reg;
};
@@ -367,7 +365,7 @@ static netdev_tx_t xrx200_start_xmit(str
goto err_drop;
/* dma needs to start on a burst length value aligned address */
- byte_offset = mapping % (priv->tx_burst_len * 4);
+ byte_offset = mapping % (XRX200_DMA_BURST_LEN * 4);
desc->addr = mapping - byte_offset;
/* Make sure the address is written before we give it to HW */
@@ -468,7 +466,8 @@ static int xrx200_dma_init(struct xrx200
int ret = 0;
int i;
- ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
+ ltq_dma_init_port(DMA_PORT_ETOP, XRX200_DMA_BURST_LEN,
+ XRX200_DMA_BURST_LEN);
ch_rx->dma.nr = XRX200_DMA_RX;
ch_rx->dma.dev = priv->dev;
@@ -578,18 +577,6 @@ static int xrx200_probe(struct platform_
if (err)
eth_hw_addr_random(net_dev);
- err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
- if (err < 0) {
- dev_err(dev, "unable to read tx-burst-length property\n");
- return err;
- }
-
- err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
- if (err < 0) {
- dev_err(dev, "unable to read rx-burst-length property\n");
- return err;
- }
-
/* bring up the dma engine and IP core */
err = xrx200_dma_init(priv);
if (err)

View File

@ -1,26 +0,0 @@
From 68eabc348148ae051631e8dab13c3b1a85c82896 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Tue, 9 Nov 2021 23:23:54 +0100
Subject: [PATCH] net: ethernet: lantiq_etop: Fix compilation error
This fixes the error detected when compiling the driver.
Fixes: 14d4e308e0aa ("net: lantiq: configure the burst length in ethernet drivers")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/lantiq_etop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/lantiq_etop.c
+++ b/drivers/net/ethernet/lantiq_etop.c
@@ -402,7 +402,7 @@ ltq_etop_dma_init(struct net_device *dev
int rx = priv->rx_irq - LTQ_DMA_ETOP;
int err;
- ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
+ ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, priv->rx_burst_len);
priv->txch.dma.nr = tx;
priv->txch.dma.dev = &priv->pdev->dev;

View File

@ -1,28 +0,0 @@
From 5112e9234bbb89f8dd15c983206bd9107b8436d5 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Tue, 4 Jan 2022 16:11:42 +0100
Subject: [PATCH 713/715] MIPS: lantiq: dma: increase descritor count
NAT Performance results on BT Home Hub 5A (kernel 5.10.89, mtu 1500):
Down Up
Before 539 Mbps 599 Mbps
After 545 Mbps 625 Mbps
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
arch/mips/include/asm/mach-lantiq/xway/xway_dma.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
@@ -8,7 +8,7 @@
#define LTQ_DMA_H__
#define LTQ_DESC_SIZE 0x08 /* each descriptor is 64bit */
-#define LTQ_DESC_NUM 0x40 /* 64 descriptors / channel */
+#define LTQ_DESC_NUM 0xC0 /* 192 descriptors / channel */
#define LTQ_DMA_OWN BIT(31) /* owner bit */
#define LTQ_DMA_C BIT(30) /* complete bit */

View File

@ -1,32 +0,0 @@
From 768818d772d5d4ddc0c7eb2e62848929270ab7a3 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Tue, 4 Jan 2022 16:11:43 +0100
Subject: [PATCH 714/715] net: lantiq_xrx200: increase napi poll weigth
NAT Performance results on BT Home Hub 5A (kernel 5.10.89, mtu 1500):
Down Up
Before 545 Mbps 625 Mbps
After 577 Mbps 648 Mbps
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/lantiq_xrx200.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -597,8 +597,10 @@ static int xrx200_probe(struct platform_
PMAC_HD_CTL);
/* setup NAPI */
- netif_napi_add(net_dev, &priv->chan_rx.napi, xrx200_poll_rx, 32);
- netif_tx_napi_add(net_dev, &priv->chan_tx.napi, xrx200_tx_housekeeping, 32);
+ netif_napi_add(net_dev, &priv->chan_rx.napi, xrx200_poll_rx,
+ NAPI_POLL_WEIGHT);
+ netif_tx_napi_add(net_dev, &priv->chan_tx.napi, xrx200_tx_housekeeping,
+ NAPI_POLL_WEIGHT);
platform_set_drvdata(pdev, priv);

View File

@ -1,206 +0,0 @@
From e015593573b3e3f74bd8a63c05fa92902194a354 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Tue, 4 Jan 2022 16:11:44 +0100
Subject: [PATCH 715/715] net: lantiq_xrx200: convert to build_skb
We can increase the efficiency of rx path by using buffers to receive
packets then build SKBs around them just before passing into the network
stack. In contrast, preallocating SKBs too early reduces CPU cache
efficiency.
NAT Performance results on BT Home Hub 5A (kernel 5.10.89, mtu 1500):
Down Up
Before 577 Mbps 648 Mbps
After 624 Mbps 695 Mbps
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/lantiq_xrx200.c | 56 ++++++++++++++++++----------
1 file changed, 36 insertions(+), 20 deletions(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -63,7 +63,11 @@ struct xrx200_chan {
struct napi_struct napi;
struct ltq_dma_channel dma;
- struct sk_buff *skb[LTQ_DESC_NUM];
+
+ union {
+ struct sk_buff *skb[LTQ_DESC_NUM];
+ void *rx_buff[LTQ_DESC_NUM];
+ };
struct sk_buff *skb_head;
struct sk_buff *skb_tail;
@@ -78,6 +82,7 @@ struct xrx200_priv {
struct xrx200_chan chan_rx;
u16 rx_buf_size;
+ u16 rx_skb_size;
struct net_device *net_dev;
struct device *dev;
@@ -115,6 +120,12 @@ static int xrx200_buffer_size(int mtu)
return round_up(xrx200_max_frame_len(mtu), 4 * XRX200_DMA_BURST_LEN);
}
+static int xrx200_skb_size(u16 buf_size)
+{
+ return SKB_DATA_ALIGN(buf_size + NET_SKB_PAD + NET_IP_ALIGN) +
+ SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
+}
+
/* drop all the packets from the DMA ring */
static void xrx200_flush_dma(struct xrx200_chan *ch)
{
@@ -173,30 +184,29 @@ static int xrx200_close(struct net_devic
return 0;
}
-static int xrx200_alloc_skb(struct xrx200_chan *ch)
+static int xrx200_alloc_buf(struct xrx200_chan *ch, void *(*alloc)(unsigned int size))
{
- struct sk_buff *skb = ch->skb[ch->dma.desc];
+ void *buf = ch->rx_buff[ch->dma.desc];
struct xrx200_priv *priv = ch->priv;
dma_addr_t mapping;
int ret = 0;
- ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(priv->net_dev,
- priv->rx_buf_size);
- if (!ch->skb[ch->dma.desc]) {
+ ch->rx_buff[ch->dma.desc] = alloc(priv->rx_skb_size);
+ if (!ch->rx_buff[ch->dma.desc]) {
ret = -ENOMEM;
goto skip;
}
- mapping = dma_map_single(priv->dev, ch->skb[ch->dma.desc]->data,
+ mapping = dma_map_single(priv->dev, ch->rx_buff[ch->dma.desc],
priv->rx_buf_size, DMA_FROM_DEVICE);
if (unlikely(dma_mapping_error(priv->dev, mapping))) {
- dev_kfree_skb_any(ch->skb[ch->dma.desc]);
- ch->skb[ch->dma.desc] = skb;
+ skb_free_frag(ch->rx_buff[ch->dma.desc]);
+ ch->rx_buff[ch->dma.desc] = buf;
ret = -ENOMEM;
goto skip;
}
- ch->dma.desc_base[ch->dma.desc].addr = mapping;
+ ch->dma.desc_base[ch->dma.desc].addr = mapping + NET_SKB_PAD + NET_IP_ALIGN;
/* Make sure the address is written before we give it to HW */
wmb();
skip:
@@ -210,13 +220,14 @@ static int xrx200_hw_receive(struct xrx2
{
struct xrx200_priv *priv = ch->priv;
struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
- struct sk_buff *skb = ch->skb[ch->dma.desc];
+ void *buf = ch->rx_buff[ch->dma.desc];
u32 ctl = desc->ctl;
int len = (ctl & LTQ_DMA_SIZE_MASK);
struct net_device *net_dev = priv->net_dev;
+ struct sk_buff *skb;
int ret;
- ret = xrx200_alloc_skb(ch);
+ ret = xrx200_alloc_buf(ch, napi_alloc_frag);
ch->dma.desc++;
ch->dma.desc %= LTQ_DESC_NUM;
@@ -227,19 +238,21 @@ static int xrx200_hw_receive(struct xrx2
return ret;
}
+ skb = build_skb(buf, priv->rx_skb_size);
+ skb_reserve(skb, NET_SKB_PAD);
skb_put(skb, len);
/* add buffers to skb via skb->frag_list */
if (ctl & LTQ_DMA_SOP) {
ch->skb_head = skb;
ch->skb_tail = skb;
+ skb_reserve(skb, NET_IP_ALIGN);
} else if (ch->skb_head) {
if (ch->skb_head == ch->skb_tail)
skb_shinfo(ch->skb_tail)->frag_list = skb;
else
ch->skb_tail->next = skb;
ch->skb_tail = skb;
- skb_reserve(ch->skb_tail, -NET_IP_ALIGN);
ch->skb_head->len += skb->len;
ch->skb_head->data_len += skb->len;
ch->skb_head->truesize += skb->truesize;
@@ -395,12 +408,13 @@ xrx200_change_mtu(struct net_device *net
struct xrx200_chan *ch_rx = &priv->chan_rx;
int old_mtu = net_dev->mtu;
bool running = false;
- struct sk_buff *skb;
+ void *buff;
int curr_desc;
int ret = 0;
net_dev->mtu = new_mtu;
priv->rx_buf_size = xrx200_buffer_size(new_mtu);
+ priv->rx_skb_size = xrx200_skb_size(priv->rx_buf_size);
if (new_mtu <= old_mtu)
return ret;
@@ -416,14 +430,15 @@ xrx200_change_mtu(struct net_device *net
for (ch_rx->dma.desc = 0; ch_rx->dma.desc < LTQ_DESC_NUM;
ch_rx->dma.desc++) {
- skb = ch_rx->skb[ch_rx->dma.desc];
- ret = xrx200_alloc_skb(ch_rx);
+ buff = ch_rx->rx_buff[ch_rx->dma.desc];
+ ret = xrx200_alloc_buf(ch_rx, netdev_alloc_frag);
if (ret) {
net_dev->mtu = old_mtu;
priv->rx_buf_size = xrx200_buffer_size(old_mtu);
+ priv->rx_skb_size = xrx200_skb_size(priv->rx_buf_size);
break;
}
- dev_kfree_skb_any(skb);
+ skb_free_frag(buff);
}
ch_rx->dma.desc = curr_desc;
@@ -476,7 +491,7 @@ static int xrx200_dma_init(struct xrx200
ltq_dma_alloc_rx(&ch_rx->dma);
for (ch_rx->dma.desc = 0; ch_rx->dma.desc < LTQ_DESC_NUM;
ch_rx->dma.desc++) {
- ret = xrx200_alloc_skb(ch_rx);
+ ret = xrx200_alloc_buf(ch_rx, netdev_alloc_frag);
if (ret)
goto rx_free;
}
@@ -511,7 +526,7 @@ rx_ring_free:
/* free the allocated RX ring */
for (i = 0; i < LTQ_DESC_NUM; i++) {
if (priv->chan_rx.skb[i])
- dev_kfree_skb_any(priv->chan_rx.skb[i]);
+ skb_free_frag(priv->chan_rx.rx_buff[i]);
}
rx_free:
@@ -528,7 +543,7 @@ static void xrx200_hw_cleanup(struct xrx
/* free the allocated RX ring */
for (i = 0; i < LTQ_DESC_NUM; i++)
- dev_kfree_skb_any(priv->chan_rx.skb[i]);
+ skb_free_frag(priv->chan_rx.rx_buff[i]);
}
static int xrx200_probe(struct platform_device *pdev)
@@ -553,6 +568,7 @@ static int xrx200_probe(struct platform_
net_dev->min_mtu = ETH_ZLEN;
net_dev->max_mtu = XRX200_DMA_DATA_LEN - xrx200_max_frame_len(0);
priv->rx_buf_size = xrx200_buffer_size(ETH_DATA_LEN);
+ priv->rx_skb_size = xrx200_skb_size(priv->rx_buf_size);
/* load the memory ranges */
priv->pmac_reg = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);

View File

@ -1,30 +0,0 @@
From dd830aed23c6e07cd8e2a163742bf3d63c9add08 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 5 Mar 2022 12:20:39 +0100
Subject: net: lantiq_xrx200: fix use after free bug
The skb->len field is read after the packet is sent to the network
stack. In the meantime, skb can be freed. This patch fixes this bug.
Fixes: c3e6b2c35b34 ("net: lantiq_xrx200: add ingress SG DMA support")
Reported-by: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/lantiq_xrx200.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -260,9 +260,9 @@ static int xrx200_hw_receive(struct xrx2
if (ctl & LTQ_DMA_EOP) {
ch->skb_head->protocol = eth_type_trans(ch->skb_head, net_dev);
- netif_receive_skb(ch->skb_head);
net_dev->stats.rx_packets++;
net_dev->stats.rx_bytes += ch->skb_head->len;
+ netif_receive_skb(ch->skb_head);
ch->skb_head = NULL;
ch->skb_tail = NULL;
ret = XRX200_DMA_PACKET_COMPLETE;

View File

@ -1,33 +0,0 @@
From c8b043702dc0894c07721c5b019096cebc8c798f Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Wed, 24 Aug 2022 23:54:06 +0200
Subject: [PATCH] net: lantiq_xrx200: confirm skb is allocated before using
xrx200_hw_receive() assumes build_skb() always works and goes straight
to skb_reserve(). However, build_skb() can fail under memory pressure.
Add a check in case build_skb() failed to allocate and return NULL.
Fixes: e015593573b3 ("net: lantiq_xrx200: convert to build_skb")
Reported-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/lantiq_xrx200.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -239,6 +239,12 @@ static int xrx200_hw_receive(struct xrx2
}
skb = build_skb(buf, priv->rx_skb_size);
+ if (!skb) {
+ skb_free_frag(buf);
+ net_dev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
skb_reserve(skb, NET_SKB_PAD);
skb_put(skb, len);

View File

@ -1,33 +0,0 @@
From c4b6e9341f930e4dd089231c0414758f5f1f9dbd Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Wed, 24 Aug 2022 23:54:07 +0200
Subject: [PATCH] net: lantiq_xrx200: fix lock under memory pressure
When the xrx200_hw_receive() function returns -ENOMEM, the NAPI poll
function immediately returns an error.
This is incorrect for two reasons:
* the function terminates without enabling interrupts or scheduling NAPI,
* the error code (-ENOMEM) is returned instead of the number of received
packets.
After the first memory allocation failure occurs, packet reception is
locked due to disabled interrupts from DMA..
Fixes: fe1a56420cf2 ("net: lantiq: Add Lantiq / Intel VRX200 Ethernet driver")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/lantiq_xrx200.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -294,7 +294,7 @@ static int xrx200_poll_rx(struct napi_st
if (ret == XRX200_DMA_PACKET_IN_PROGRESS)
continue;
if (ret != XRX200_DMA_PACKET_COMPLETE)
- return ret;
+ break;
rx++;
} else {
break;

View File

@ -1,27 +0,0 @@
From c9c3b1775f80fa21f5bff874027d2ccb10f5d90c Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Wed, 24 Aug 2022 23:54:08 +0200
Subject: [PATCH] net: lantiq_xrx200: restore buffer if memory allocation
failed
In a situation where memory allocation fails, an invalid buffer address
is stored. When this descriptor is used again, the system panics in the
build_skb() function when accessing memory.
Fixes: 7ea6cd16f159 ("lantiq: net: fix duplicated skb in rx descriptor ring")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/lantiq_xrx200.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -193,6 +193,7 @@ static int xrx200_alloc_buf(struct xrx20
ch->rx_buff[ch->dma.desc] = alloc(priv->rx_skb_size);
if (!ch->rx_buff[ch->dma.desc]) {
+ ch->rx_buff[ch->dma.desc] = buf;
ret = -ENOMEM;
goto skip;
}

View File

@ -1,5 +1,7 @@
CONFIG_AT803X_PHY=y
CONFIG_BLK_MQ_PCI=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_RMAP=y
@ -11,6 +13,7 @@ CONFIG_CRYPTO_ZSTD=y
CONFIG_EXTRA_FIRMWARE="lantiq/xrx200_phy11g_a14.bin lantiq/xrx200_phy11g_a22.bin lantiq/xrx200_phy22f_a14.bin lantiq/xrx200_phy22f_a22.bin"
CONFIG_EXTRA_FIRMWARE_DIR="firmware"
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GRO_CELLS=y
CONFIG_HWMON=y
CONFIG_HW_RANDOM=y
@ -63,6 +66,7 @@ CONFIG_PHY_LANTIQ_VRX200_PCIE=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_SUPPLY=y
CONFIG_POWER_SUPPLY_HWMON=y
CONFIG_QCOM_NET_PHYLIB=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_REGULATOR=y
@ -87,5 +91,6 @@ CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@ -2,6 +2,8 @@ CONFIG_ADM6996_PHY=y
CONFIG_AR8216_PHY=y
CONFIG_AT803X_PHY=y
CONFIG_BLK_MQ_PCI=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_RMAP=y
@ -12,6 +14,7 @@ CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_HW_RANDOM=y
CONFIG_INPUT=y
CONFIG_INPUT_EVDEV=y
@ -43,6 +46,7 @@ CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_LANTIQ=y
CONFIG_PSB6970_PHY=y
CONFIG_QCOM_NET_PHYLIB=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_REGULATOR=y
@ -72,5 +76,6 @@ CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y