kernel: bump 6.1 to 6.1.89

Changelogs:
https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.67
https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.68
https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.69

Upstreamed patches:
target/linux/generic/backport-6.1/740-v6.9-01-netfilter-flowtable-validate-pppoe-header.patch [1]
target/linux/generic/backport-6.1/740-v6.9-02-netfilter-flowtable-incorrect-pppoe-tuple.patch [2]
target/linux/generic/backport-6.1/790-48-STABLE-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch [3]
target/linux/generic/backport-6.1/790-50-v6.10-net-dsa-mt7530-fix-mirroring-frames-received-on-loca.patch [4]
target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch [5]
target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch [6]
target/linux/generic/backport-6.1/790-47-v6.10-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch [7]
target/linux/mediatek/patches-6.1/220-v6.3-clk-mediatek-clk-gate-Propagate-struct-device-with-m.patch [8]
target/linux/mediatek/patches-6.1/222-v6.3-clk-mediatek-clk-mtk-Propagate-struct-device-for-com.patch [9]
target/linux/mediatek/patches-6.1/223-v6.3-clk-mediatek-clk-mux-Propagate-struct-device-for-mtk.patch [10]
target/linux/mediatek/patches-6.1/226-v6.3-clk-mediatek-clk-mtk-Extend-mtk_clk_simple_probe.patch [11]

Symbol changes:
MITIGATION_SPECTRE_BHI (new) [12]
SPECTRE_BHI_{ON,OFF} (deprecated) [12]

References:
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=8bf7c76a2a207ca2b4cfda0a279192adf27678d7
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=f1c3c61701a0b12f4906152c1626a5de580ea3d2
[3] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=19643bf8c9b5bb5eea5163bf2f6a3eee6fb5b99b
[4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=e86c9db58eba290e858e2bb80efcde9e3973a5ef
[5] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=013c787d231188a6408e2991150d3c9bf9a2aa0b
[6] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=41a004ffba9b1fd8a5a7128ebd0dfa3ed39c3316
[7] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=7d51db455ca03e5270cc585a75a674abd063fa6c
[8] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=082b831488a41257b7ac7ffa1d80a0b60d98394d
[9] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=6f5f72a684a2823f21efbfd20c7e4b528c44a781
[10] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=a4fe8813a7868ba5867e42e60de7a2b8baac30ff
[11] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=c1d87d56af063c87961511ee25f6b07a5676d27d
[12] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.89&id=d844df110084ef8bd950a52194865f3f63b561ca
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
This commit is contained in:
Shiji Yang 2024-04-29 15:09:24 +00:00 committed by Hauke Mehrtens
parent dcdcb9228b
commit 9e86e0b33b
95 changed files with 309 additions and 2229 deletions

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@ -1,2 +1,2 @@
LINUX_VERSION-6.1 = .86
LINUX_KERNEL_HASH-6.1.86 = d3d3c8c44f0f0a870a95bd2823f9d91979d1aa6f266da5d8cccd0c4b15e3115b
LINUX_VERSION-6.1 = .89
LINUX_KERNEL_HASH-6.1.89 = 12bab8e092618d1d4eeaf4201e6e70054c94896198956bd84ff0e908b0264719

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@ -1185,7 +1185,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
}
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -5686,7 +5686,7 @@ static void port_event(struct usb_hub *h
@@ -5697,7 +5697,7 @@ static void port_event(struct usb_hub *h
port_dev->over_current_count++;
port_over_current_notify(port_dev);

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@ -90,10 +90,10 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
+ */
+ void (*fixup_endpoint)(struct usb_hcd *hcd, struct usb_device *udev,
+ struct usb_host_endpoint *ep, int interval);
/* Returns the hardware-chosen device address */
int (*address_device)(struct usb_hcd *, struct usb_device *udev);
/* prepares the hardware to send commands to the device */
@@ -435,6 +440,8 @@ extern void usb_hcd_unmap_urb_setup_for_
/* Set the hardware-chosen device address */
int (*address_device)(struct usb_hcd *, struct usb_device *udev,
unsigned int timeout_ms);
@@ -436,6 +441,8 @@ extern void usb_hcd_unmap_urb_setup_for_
extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *, struct urb *);
extern void usb_hcd_flush_endpoint(struct usb_device *udev,
struct usb_host_endpoint *ep);

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@ -125,7 +125,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
* non-error returns are a promise to giveback() the urb later
* we drop ownership so next owner (or urb unlink) can get it
*/
@@ -5471,6 +5574,7 @@ static const struct hc_driver xhci_hc_dr
@@ -5480,6 +5583,7 @@ static const struct hc_driver xhci_hc_dr
.endpoint_reset = xhci_endpoint_reset,
.check_bandwidth = xhci_check_bandwidth,
.reset_bandwidth = xhci_reset_bandwidth,

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@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -2522,9 +2522,11 @@ int xhci_mem_init(struct xhci_hcd *xhci,
@@ -2524,9 +2524,11 @@ int xhci_mem_init(struct xhci_hcd *xhci,
* Event ring setup: Allocate a normal ring, but also setup
* the event ring segment table (ERST). Section 4.9.3.
*/
@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
if (!xhci->event_ring)
goto fail;
if (xhci_check_trb_in_td_math(xhci) < 0)
@@ -2537,7 +2539,7 @@ int xhci_mem_init(struct xhci_hcd *xhci,
@@ -2539,7 +2541,7 @@ int xhci_mem_init(struct xhci_hcd *xhci,
/* set ERST count with the number of entries in the segment table */
val = readl(&xhci->ir_set->erst_size);
val &= ERST_SIZE_MASK;
@ -47,7 +47,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
val);
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1672,8 +1672,8 @@ struct urb_priv {
@@ -1677,8 +1677,8 @@ struct urb_priv {
* Each segment table entry is 4*32bits long. 1K seems like an ok size:
* (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
* meaning 64 ring segments.

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@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -674,9 +674,9 @@ deq_found:
@@ -675,9 +675,9 @@ deq_found:
}
if ((ep->ep_state & SET_DEQ_PENDING)) {

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@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) {
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -664,6 +664,15 @@ static int xhci_move_dequeue_past_td(str
@@ -665,6 +665,15 @@ static int xhci_move_dequeue_past_td(str
} while (!cycle_found || !td_last_trb_found);
deq_found:
@ -54,7 +54,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
addr = xhci_trb_virt_to_dma(new_seg, new_deq);
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1902,6 +1902,7 @@ struct xhci_hcd {
@@ -1907,6 +1907,7 @@ struct xhci_hcd {
#define XHCI_RESET_TO_DEFAULT BIT_ULL(44)
#define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45)
#define XHCI_ZHAOXIN_HOST BIT_ULL(46)

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@ -144,7 +144,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
if (ret)
return -ENOMEM;
@@ -1811,7 +1815,7 @@ int xhci_alloc_erst(struct xhci_hcd *xhc
@@ -1813,7 +1817,7 @@ int xhci_alloc_erst(struct xhci_hcd *xhc
for (val = 0; val < evt_ring->num_segs; val++) {
entry = &erst->entries[val];
entry->seg_addr = cpu_to_le64(seg->dma);
@ -204,7 +204,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
xhci_err(xhci, "Tried to move enqueue past ring segment\n");
return;
}
@@ -3150,7 +3153,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd
@@ -3151,7 +3154,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd
* that clears the EHB.
*/
while (xhci_handle_event(xhci) > 0) {
@ -213,7 +213,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
continue;
xhci_update_erst_dequeue(xhci, event_ring_deq);
event_ring_deq = xhci->event_ring->dequeue;
@@ -3292,7 +3295,8 @@ static int prepare_ring(struct xhci_hcd
@@ -3293,7 +3296,8 @@ static int prepare_ring(struct xhci_hcd
}
}
@ -247,7 +247,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
* when the cycle bit is set to 1.
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1634,6 +1634,7 @@ struct xhci_ring {
@@ -1639,6 +1639,7 @@ struct xhci_ring {
unsigned int num_trbs_free;
unsigned int num_trbs_free_temp;
unsigned int bounce_buf_len;

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@ -63,7 +63,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1904,6 +1904,7 @@ struct xhci_hcd {
@@ -1909,6 +1909,7 @@ struct xhci_hcd {
#define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45)
#define XHCI_ZHAOXIN_HOST BIT_ULL(46)
#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(47)

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@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -3605,14 +3605,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
@@ -3606,14 +3606,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
unsigned int num_trbs;
unsigned int start_cycle, num_sgs = 0;
unsigned int enqd_len, block_len, trb_buff_len, full_len;
@ -54,7 +54,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
full_len = urb->transfer_buffer_length;
/* If we have scatter/gather list, we use it. */
if (urb->num_sgs && !(urb->transfer_flags & URB_DMA_MAP_SINGLE)) {
@@ -3649,6 +3650,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
@@ -3650,6 +3651,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
start_cycle = ring->cycle_state;
send_addr = addr;
@ -72,7 +72,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
/* Queue the TRBs, even if they are zero-length */
for (enqd_len = 0; first_trb || enqd_len < full_len;
enqd_len += trb_buff_len) {
@@ -3661,6 +3673,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
@@ -3662,6 +3674,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
if (enqd_len + trb_buff_len > full_len)
trb_buff_len = full_len - enqd_len;
@ -86,7 +86,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
first_trb = false;
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1905,6 +1905,7 @@ struct xhci_hcd {
@@ -1910,6 +1910,7 @@ struct xhci_hcd {
#define XHCI_ZHAOXIN_HOST BIT_ULL(46)
#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(47)
#define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(48)

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@ -13,7 +13,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -3605,7 +3605,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
@@ -3606,7 +3606,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
unsigned int num_trbs;
unsigned int start_cycle, num_sgs = 0;
unsigned int enqd_len, block_len, trb_buff_len, full_len;
@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
u32 field, length_field, remainder, maxpacket;
u64 addr, send_addr;
@@ -3651,14 +3651,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
@@ -3652,14 +3652,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
send_addr = addr;
if (xhci->quirks & XHCI_VLI_SS_BULK_OUT_BUG &&
@ -40,7 +40,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
}
/* Queue the TRBs, even if they are zero-length */
@@ -3673,7 +3668,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
@@ -3674,7 +3669,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
if (enqd_len + trb_buff_len > full_len)
trb_buff_len = full_len - enqd_len;

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@ -31,7 +31,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1012,11 +1012,13 @@ static int xhci_invalidate_cancelled_tds
@@ -1013,11 +1013,13 @@ static int xhci_invalidate_cancelled_tds
td->urb->stream_id, td->urb,
cached_td->urb->stream_id, cached_td->urb);
cached_td = td;
@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
}
}
@@ -1264,10 +1266,7 @@ static void update_ring_for_set_deq_comp
@@ -1265,10 +1267,7 @@ static void update_ring_for_set_deq_comp
unsigned int ep_index)
{
union xhci_trb *dequeue_temp;
@ -56,7 +56,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
dequeue_temp = ep_ring->dequeue;
/* If we get two back-to-back stalls, and the first stalled transfer
@@ -1282,8 +1281,6 @@ static void update_ring_for_set_deq_comp
@@ -1283,8 +1282,6 @@ static void update_ring_for_set_deq_comp
}
while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
@ -65,7 +65,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
ep_ring->dequeue++;
if (trb_is_link(ep_ring->dequeue)) {
if (ep_ring->dequeue ==
@@ -1293,15 +1290,10 @@ static void update_ring_for_set_deq_comp
@@ -1294,15 +1291,10 @@ static void update_ring_for_set_deq_comp
ep_ring->dequeue = ep_ring->deq_seg->trbs;
}
if (ep_ring->dequeue == dequeue_temp) {

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@ -40,7 +40,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -3582,6 +3582,48 @@ static int xhci_align_td(struct xhci_hcd
@@ -3583,6 +3583,48 @@ static int xhci_align_td(struct xhci_hcd
return 1;
}
@ -89,7 +89,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
/* This is very similar to what ehci-q.c qtd_fill() does */
int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
struct urb *urb, int slot_id, unsigned int ep_index)
@@ -3750,6 +3792,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
@@ -3751,6 +3793,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
}
check_trb_math(urb, enqd_len);
@ -98,7 +98,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
start_cycle, start_trb);
return 0;
@@ -3885,6 +3929,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
@@ -3886,6 +3930,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
/* Event on completion */
field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
@ -109,7 +109,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
return 0;
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1906,6 +1906,7 @@ struct xhci_hcd {
@@ -1911,6 +1911,7 @@ struct xhci_hcd {
#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(47)
#define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(48)
#define XHCI_VLI_SS_BULK_OUT_BUG BIT_ULL(49)

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@ -108,7 +108,7 @@ it on BCM4708 family.
if (xhci->quirks & XHCI_NEC_HOST)
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1902,6 +1902,7 @@ struct xhci_hcd {
@@ -1907,6 +1907,7 @@ struct xhci_hcd {
#define XHCI_RESET_TO_DEFAULT BIT_ULL(44)
#define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45)
#define XHCI_ZHAOXIN_HOST BIT_ULL(46)

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@ -1,87 +0,0 @@
From: Pablo Neira Ayuso <pablo@netfilter.org>
Date: Thu, 11 Apr 2024 13:28:59 +0200
Subject: [PATCH] netfilter: flowtable: validate pppoe header
Ensure there is sufficient room to access the protocol field of the
PPPoe header. Validate it once before the flowtable lookup, then use a
helper function to access protocol field.
Reported-by: syzbot+b6f07e1c07ef40199081@syzkaller.appspotmail.com
Fixes: 72efd585f714 ("netfilter: flowtable: add pppoe support")
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
---
--- a/include/net/netfilter/nf_flow_table.h
+++ b/include/net/netfilter/nf_flow_table.h
@@ -335,7 +335,7 @@ int nf_flow_rule_route_ipv6(struct net *
int nf_flow_table_offload_init(void);
void nf_flow_table_offload_exit(void);
-static inline __be16 nf_flow_pppoe_proto(const struct sk_buff *skb)
+static inline __be16 __nf_flow_pppoe_proto(const struct sk_buff *skb)
{
__be16 proto;
@@ -351,6 +351,16 @@ static inline __be16 nf_flow_pppoe_proto
return 0;
}
+static inline bool nf_flow_pppoe_proto(struct sk_buff *skb, __be16 *inner_proto)
+{
+ if (!pskb_may_pull(skb, PPPOE_SES_HLEN))
+ return false;
+
+ *inner_proto = __nf_flow_pppoe_proto(skb);
+
+ return true;
+}
+
#define NF_FLOW_TABLE_STAT_INC(net, count) __this_cpu_inc((net)->ft.stat->count)
#define NF_FLOW_TABLE_STAT_DEC(net, count) __this_cpu_dec((net)->ft.stat->count)
#define NF_FLOW_TABLE_STAT_INC_ATOMIC(net, count) \
--- a/net/netfilter/nf_flow_table_inet.c
+++ b/net/netfilter/nf_flow_table_inet.c
@@ -21,7 +21,8 @@ nf_flow_offload_inet_hook(void *priv, st
proto = veth->h_vlan_encapsulated_proto;
break;
case htons(ETH_P_PPP_SES):
- proto = nf_flow_pppoe_proto(skb);
+ if (!nf_flow_pppoe_proto(skb, &proto))
+ return NF_ACCEPT;
break;
default:
proto = skb->protocol;
--- a/net/netfilter/nf_flow_table_ip.c
+++ b/net/netfilter/nf_flow_table_ip.c
@@ -267,10 +267,11 @@ static unsigned int nf_flow_xmit_xfrm(st
return NF_STOLEN;
}
-static bool nf_flow_skb_encap_protocol(const struct sk_buff *skb, __be16 proto,
+static bool nf_flow_skb_encap_protocol(struct sk_buff *skb, __be16 proto,
u32 *offset)
{
struct vlan_ethhdr *veth;
+ __be16 inner_proto;
switch (skb->protocol) {
case htons(ETH_P_8021Q):
@@ -281,7 +282,8 @@ static bool nf_flow_skb_encap_protocol(c
}
break;
case htons(ETH_P_PPP_SES):
- if (nf_flow_pppoe_proto(skb) == proto) {
+ if (nf_flow_pppoe_proto(skb, &inner_proto) &&
+ inner_proto == proto) {
*offset += PPPOE_SES_HLEN;
return true;
}
@@ -310,7 +312,7 @@ static void nf_flow_encap_pop(struct sk_
skb_reset_network_header(skb);
break;
case htons(ETH_P_PPP_SES):
- skb->protocol = nf_flow_pppoe_proto(skb);
+ skb->protocol = __nf_flow_pppoe_proto(skb);
skb_pull(skb, PPPOE_SES_HLEN);
skb_reset_network_header(skb);
break;

View File

@ -1,24 +0,0 @@
From: Pablo Neira Ayuso <pablo@netfilter.org>
Date: Thu, 11 Apr 2024 13:29:00 +0200
Subject: [PATCH] netfilter: flowtable: incorrect pppoe tuple
pppoe traffic reaching ingress path does not match the flowtable entry
because the pppoe header is expected to be at the network header offset.
This bug causes a mismatch in the flow table lookup, so pppoe packets
enter the classical forwarding path.
Fixes: 72efd585f714 ("netfilter: flowtable: add pppoe support")
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
---
--- a/net/netfilter/nf_flow_table_ip.c
+++ b/net/netfilter/nf_flow_table_ip.c
@@ -156,7 +156,7 @@ static void nf_flow_tuple_encap(struct s
tuple->encap[i].proto = skb->protocol;
break;
case htons(ETH_P_PPP_SES):
- phdr = (struct pppoe_hdr *)skb_mac_header(skb);
+ phdr = (struct pppoe_hdr *)skb_network_header(skb);
tuple->encap[i].id = ntohs(phdr->sid);
tuple->encap[i].proto = skb->protocol;
break;

View File

@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
--- a/net/dsa/dsa2.c
+++ b/net/dsa/dsa2.c
@@ -1736,6 +1736,15 @@ static int dsa_switch_probe(struct dsa_s
@@ -1758,6 +1758,15 @@ static int dsa_switch_probe(struct dsa_s
if (!ds->num_ports)
return -EINVAL;

View File

@ -20,7 +20,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3010,9 +3010,6 @@ static void mt753x_phylink_get_caps(stru
@@ -3198,9 +3198,6 @@ static void mt753x_phylink_get_caps(stru
config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
MAC_10 | MAC_100 | MAC_1000FD;

View File

@ -44,7 +44,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
#include <linux/phylink.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
@@ -2651,128 +2652,11 @@ static int mt7531_rgmii_setup(struct mt7
@@ -2839,128 +2840,11 @@ static int mt7531_rgmii_setup(struct mt7
return 0;
}
@ -173,7 +173,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static int
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
@@ -2795,11 +2679,11 @@ mt7531_mac_config(struct dsa_switch *ds,
@@ -2983,11 +2867,11 @@ mt7531_mac_config(struct dsa_switch *ds,
phydev = dp->slave->phydev;
return mt7531_rgmii_setup(priv, port, interface, phydev);
case PHY_INTERFACE_MODE_SGMII:
@ -187,7 +187,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
default:
return -EINVAL;
}
@@ -2824,11 +2708,11 @@ mt753x_phylink_mac_select_pcs(struct dsa
@@ -3012,11 +2896,11 @@ mt753x_phylink_mac_select_pcs(struct dsa
switch (interface) {
case PHY_INTERFACE_MODE_TRGMII:
@ -201,7 +201,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
default:
return NULL;
}
@@ -3066,86 +2950,6 @@ static void mt7530_pcs_get_state(struct
@@ -3254,86 +3138,6 @@ static void mt7530_pcs_get_state(struct
state->pause |= MLO_PAUSE_TX;
}
@ -288,7 +288,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
phy_interface_t interface,
const unsigned long *advertising,
@@ -3165,18 +2969,57 @@ static const struct phylink_pcs_ops mt75
@@ -3353,18 +3157,57 @@ static const struct phylink_pcs_ops mt75
.pcs_an_restart = mt7530_pcs_an_restart,
};
@ -352,7 +352,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
int i, ret;
/* Initialise the PCS devices */
@@ -3184,8 +3027,6 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3372,8 +3215,6 @@ mt753x_setup(struct dsa_switch *ds)
priv->pcs[i].pcs.ops = priv->info->pcs_ops;
priv->pcs[i].priv = priv;
priv->pcs[i].port = i;
@ -361,7 +361,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
ret = priv->info->sw_setup(ds);
@@ -3200,6 +3041,16 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3388,6 +3229,16 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
@ -378,7 +378,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
return ret;
}
@@ -3291,7 +3142,7 @@ static const struct mt753x_info mt753x_t
@@ -3480,7 +3331,7 @@ static const struct mt753x_info mt753x_t
},
[ID_MT7531] = {
.id = ID_MT7531,
@ -387,7 +387,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.sw_setup = mt7531_setup,
.phy_read = mt7531_ind_phy_read,
.phy_write = mt7531_ind_phy_write,
@@ -3399,7 +3250,7 @@ static void
@@ -3588,7 +3439,7 @@ static void
mt7530_remove(struct mdio_device *mdiodev)
{
struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev);
@ -396,7 +396,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (!priv)
return;
@@ -3418,6 +3269,10 @@ mt7530_remove(struct mdio_device *mdiode
@@ -3607,6 +3458,10 @@ mt7530_remove(struct mdio_device *mdiode
mt7530_free_irq(priv);
dsa_unregister_switch(priv->ds);
@ -409,7 +409,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -391,47 +391,8 @@ enum mt7530_vlan_port_acc_frm {
@@ -401,47 +401,8 @@ enum mt7530_vlan_port_acc_frm {
CCR_TX_OCT_CNT_BAD)
/* MT7531 SGMII register group */
@ -459,7 +459,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Register for system reset */
#define MT7530_SYS_CTRL 0x7000
@@ -730,13 +691,13 @@ struct mt7530_fdb {
@@ -741,13 +702,13 @@ struct mt7530_fdb {
* @pm: The matrix used to show all connections with the port.
* @pvid: The VLAN specified is to be considered a PVID at ingress. Any
* untagged frames will be assigned to the related VLAN.

View File

@ -18,7 +18,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3001,26 +3001,56 @@ static const struct regmap_bus mt7531_re
@@ -3189,26 +3189,56 @@ static const struct regmap_bus mt7531_re
.reg_update_bits = mt7530_regmap_update_bits,
};
@ -88,7 +88,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
int i, ret;
/* Initialise the PCS devices */
@@ -3042,15 +3072,11 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3230,15 +3260,11 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);

View File

@ -19,7 +19,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2974,7 +2974,7 @@ static int mt7530_regmap_read(void *cont
@@ -3162,7 +3162,7 @@ static int mt7530_regmap_read(void *cont
{
struct mt7530_priv *priv = context;
@ -28,7 +28,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return 0;
};
@@ -2982,23 +2982,25 @@ static int mt7530_regmap_write(void *con
@@ -3170,23 +3170,25 @@ static int mt7530_regmap_write(void *con
{
struct mt7530_priv *priv = context;
@ -62,7 +62,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static int
@@ -3024,6 +3026,9 @@ mt7531_create_sgmii(struct mt7530_priv *
@@ -3212,6 +3214,9 @@ mt7531_create_sgmii(struct mt7530_priv *
mt7531_pcs_config[i]->reg_stride = 4;
mt7531_pcs_config[i]->reg_base = MT7531_SGMII_REG_BASE(5 + i);
mt7531_pcs_config[i]->max_register = 0x17c;

View File

@ -133,7 +133,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
}
static void
@@ -2970,22 +2991,6 @@ static const struct phylink_pcs_ops mt75
@@ -3158,22 +3179,6 @@ static const struct phylink_pcs_ops mt75
.pcs_an_restart = mt7530_pcs_an_restart,
};
@ -156,7 +156,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static void
mt7530_mdio_regmap_lock(void *mdio_lock)
{
@@ -2998,7 +3003,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc
@@ -3186,7 +3191,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc
mutex_unlock(mdio_lock);
}
@ -165,7 +165,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
.reg_write = mt7530_regmap_write,
.reg_read = mt7530_regmap_read,
};
@@ -3031,7 +3036,7 @@ mt7531_create_sgmii(struct mt7530_priv *
@@ -3219,7 +3224,7 @@ mt7531_create_sgmii(struct mt7530_priv *
mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock;
regmap = devm_regmap_init(priv->dev,
@ -174,7 +174,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mt7531_pcs_config[i]);
if (IS_ERR(regmap)) {
ret = PTR_ERR(regmap);
@@ -3196,6 +3201,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match)
@@ -3385,6 +3390,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match)
static int
mt7530_probe(struct mdio_device *mdiodev)
{
@ -182,7 +182,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
struct mt7530_priv *priv;
struct device_node *dn;
@@ -3275,6 +3281,21 @@ mt7530_probe(struct mdio_device *mdiodev
@@ -3464,6 +3470,21 @@ mt7530_probe(struct mdio_device *mdiodev
mutex_init(&priv->reg_mutex);
dev_set_drvdata(&mdiodev->dev, priv);
@ -206,7 +206,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -774,6 +774,7 @@ struct mt753x_info {
@@ -785,6 +785,7 @@ struct mt753x_info {
* @dev: The device pointer
* @ds: The pointer to the dsa core structure
* @bus: The bus used for the device and built-in PHY
@ -214,7 +214,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
* @rstc: The pointer to reset control used by MCM
* @core_pwr: The power supplied into the core
* @io_pwr: The power supplied into the I/O
@@ -794,6 +795,7 @@ struct mt7530_priv {
@@ -805,6 +806,7 @@ struct mt7530_priv {
struct device *dev;
struct dsa_switch *ds;
struct mii_bus *bus;

View File

@ -18,7 +18,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3082,12 +3082,6 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3270,12 +3270,6 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
@ -31,7 +31,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return ret;
}
@@ -3204,6 +3198,7 @@ mt7530_probe(struct mdio_device *mdiodev
@@ -3393,6 +3387,7 @@ mt7530_probe(struct mdio_device *mdiodev
static struct regmap_config *regmap_config;
struct mt7530_priv *priv;
struct device_node *dn;
@ -39,7 +39,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
dn = mdiodev->dev.of_node;
@@ -3296,6 +3291,12 @@ mt7530_probe(struct mdio_device *mdiodev
@@ -3485,6 +3480,12 @@ mt7530_probe(struct mdio_device *mdiodev
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);

View File

@ -114,7 +114,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
}
static void
@@ -645,14 +649,13 @@ static int
@@ -659,14 +663,13 @@ static int
mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,
int regnum)
{
@ -130,7 +130,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
@@ -685,7 +688,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr
@@ -699,7 +702,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr
ret = val & MT7531_MDIO_RW_DATA_MASK;
out:
@ -139,7 +139,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return ret;
}
@@ -694,14 +697,13 @@ static int
@@ -708,14 +711,13 @@ static int
mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,
int regnum, u32 data)
{
@ -155,7 +155,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
@@ -733,7 +735,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p
@@ -747,7 +749,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p
}
out:
@ -164,7 +164,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return ret;
}
@@ -741,14 +743,13 @@ out:
@@ -755,14 +757,13 @@ out:
static int
mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum)
{
@ -180,7 +180,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
@@ -771,7 +772,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr
@@ -785,7 +786,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr
ret = val & MT7531_MDIO_RW_DATA_MASK;
out:
@ -189,7 +189,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return ret;
}
@@ -780,14 +781,13 @@ static int
@@ -794,14 +795,13 @@ static int
mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum,
u16 data)
{
@ -205,7 +205,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg,
!(reg & MT7531_PHY_ACS_ST), 20, 100000);
@@ -809,7 +809,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p
@@ -823,7 +823,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p
}
out:
@ -214,7 +214,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return ret;
}
@@ -1161,7 +1161,6 @@ static int
@@ -1343,7 +1343,6 @@ static int
mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
{
struct mt7530_priv *priv = ds->priv;
@ -222,7 +222,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
int length;
u32 val;
@@ -1172,7 +1171,7 @@ mt7530_port_change_mtu(struct dsa_switch
@@ -1354,7 +1353,7 @@ mt7530_port_change_mtu(struct dsa_switch
if (!dsa_is_cpu_port(ds, port))
return 0;
@ -231,7 +231,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
val = mt7530_mii_read(priv, MT7530_GMACCR);
val &= ~MAX_RX_PKT_LEN_MASK;
@@ -1193,7 +1192,7 @@ mt7530_port_change_mtu(struct dsa_switch
@@ -1375,7 +1374,7 @@ mt7530_port_change_mtu(struct dsa_switch
mt7530_mii_write(priv, MT7530_GMACCR, val);
@ -240,7 +240,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return 0;
}
@@ -1994,10 +1993,10 @@ mt7530_irq_thread_fn(int irq, void *dev_
@@ -2176,10 +2175,10 @@ mt7530_irq_thread_fn(int irq, void *dev_
u32 val;
int p;
@ -253,7 +253,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
for (p = 0; p < MT7530_NUM_PHYS; p++) {
if (BIT(p) & val) {
@@ -2033,7 +2032,7 @@ mt7530_irq_bus_lock(struct irq_data *d)
@@ -2215,7 +2214,7 @@ mt7530_irq_bus_lock(struct irq_data *d)
{
struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
@ -262,7 +262,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
}
static void
@@ -2042,7 +2041,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da
@@ -2224,7 +2223,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da
struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable);

View File

@ -21,7 +21,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -950,6 +950,24 @@ mt7530_set_ageing_time(struct dsa_switch
@@ -964,6 +964,24 @@ mt7530_set_ageing_time(struct dsa_switch
return 0;
}
@ -48,7 +48,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
struct mt7530_priv *priv = ds->priv;
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -709,24 +709,6 @@ enum p5_interface_select {
@@ -720,24 +720,6 @@ enum p5_interface_select {
P5_INTF_SEL_GMAC5_SGMII,
};

View File

@ -17,7 +17,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3210,44 +3210,21 @@ static const struct of_device_id mt7530_
@@ -3399,44 +3399,21 @@ static const struct of_device_id mt7530_
MODULE_DEVICE_TABLE(of, mt7530_of_match);
static int
@ -67,7 +67,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (!priv->info)
return -EINVAL;
@@ -3261,23 +3238,53 @@ mt7530_probe(struct mdio_device *mdiodev
@@ -3450,23 +3427,53 @@ mt7530_probe(struct mdio_device *mdiodev
return -EINVAL;
priv->id = priv->info->id;
@ -131,7 +131,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
priv->reset = devm_gpiod_get_optional(&mdiodev->dev, "reset",
GPIOD_OUT_LOW);
if (IS_ERR(priv->reset)) {
@@ -3286,12 +3293,15 @@ mt7530_probe(struct mdio_device *mdiodev
@@ -3475,12 +3482,15 @@ mt7530_probe(struct mdio_device *mdiodev
}
}

View File

@ -17,7 +17,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3328,6 +3328,17 @@ mt7530_probe(struct mdio_device *mdiodev
@@ -3517,6 +3517,17 @@ mt7530_probe(struct mdio_device *mdiodev
}
static void
@ -35,7 +35,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mt7530_remove(struct mdio_device *mdiodev)
{
struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev);
@@ -3346,15 +3357,10 @@ mt7530_remove(struct mdio_device *mdiode
@@ -3535,15 +3546,10 @@ mt7530_remove(struct mdio_device *mdiode
dev_err(priv->dev, "Failed to disable io pwr: %d\n",
ret);

View File

@ -420,7 +420,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static u32
mt7530_mii_read(struct mt7530_priv *priv, u32 reg)
{
@@ -3008,72 +2959,6 @@ static const struct phylink_pcs_ops mt75
@@ -3196,72 +3147,6 @@ static const struct phylink_pcs_ops mt75
.pcs_an_restart = mt7530_pcs_an_restart,
};
@ -493,7 +493,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static int
mt753x_setup(struct dsa_switch *ds)
{
@@ -3132,7 +3017,7 @@ static int mt753x_set_mac_eee(struct dsa
@@ -3320,7 +3205,7 @@ static int mt753x_set_mac_eee(struct dsa
return 0;
}
@ -501,8 +501,8 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
+const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt753x_setup,
.get_strings = mt7530_get_strings,
@@ -3166,8 +3051,9 @@ static const struct dsa_switch_ops mt753
.preferred_default_local_cpu_port = mt753x_preferred_default_local_cpu_port,
@@ -3355,8 +3240,9 @@ static const struct dsa_switch_ops mt753
.get_mac_eee = mt753x_get_mac_eee,
.set_mac_eee = mt753x_set_mac_eee,
};
@ -513,7 +513,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
[ID_MT7621] = {
.id = ID_MT7621,
.pcs_ops = &mt7530_pcs_ops,
@@ -3200,16 +3086,9 @@ static const struct mt753x_info mt753x_t
@@ -3389,16 +3275,9 @@ static const struct mt753x_info mt753x_t
.mac_port_config = mt7531_mac_config,
},
};
@ -532,7 +532,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mt7530_probe_common(struct mt7530_priv *priv)
{
struct device *dev = priv->dev;
@@ -3246,88 +3125,9 @@ mt7530_probe_common(struct mt7530_priv *
@@ -3435,88 +3314,9 @@ mt7530_probe_common(struct mt7530_priv *
return 0;
}
@ -623,7 +623,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mt7530_remove_common(struct mt7530_priv *priv)
{
if (priv->irq)
@@ -3337,55 +3137,7 @@ mt7530_remove_common(struct mt7530_priv
@@ -3526,55 +3326,7 @@ mt7530_remove_common(struct mt7530_priv
mutex_destroy(&priv->reg_mutex);
}
@ -682,7 +682,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
MODULE_DESCRIPTION("Driver for Mediatek MT7530 Switch");
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -834,4 +834,10 @@ static inline void INIT_MT7530_DUMMY_POL
@@ -845,4 +845,10 @@ static inline void INIT_MT7530_DUMMY_POL
p->reg = reg;
}

View File

@ -184,7 +184,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
+MODULE_LICENSE("GPL");
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2041,6 +2041,47 @@ static const struct irq_domain_ops mt753
@@ -2223,6 +2223,47 @@ static const struct irq_domain_ops mt753
};
static void
@ -232,7 +232,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mt7530_setup_mdio_irq(struct mt7530_priv *priv)
{
struct dsa_switch *ds = priv->ds;
@@ -2074,8 +2115,15 @@ mt7530_setup_irq(struct mt7530_priv *pri
@@ -2256,8 +2297,15 @@ mt7530_setup_irq(struct mt7530_priv *pri
return priv->irq ? : -EINVAL;
}
@ -250,7 +250,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (!priv->irq_domain) {
dev_err(dev, "failed to create IRQ domain\n");
return -ENOMEM;
@@ -2574,6 +2622,25 @@ static void mt7531_mac_port_get_caps(str
@@ -2762,6 +2810,25 @@ static void mt7531_mac_port_get_caps(str
}
}
@ -276,7 +276,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static int
mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
{
@@ -2650,6 +2717,17 @@ static bool mt753x_is_mac_port(u32 port)
@@ -2838,6 +2905,17 @@ static bool mt753x_is_mac_port(u32 port)
}
static int
@ -294,7 +294,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
{
@@ -2719,7 +2797,8 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2907,7 +2985,8 @@ mt753x_phylink_mac_config(struct dsa_swi
switch (port) {
case 0 ... 4: /* Internal phy */
@ -304,7 +304,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
goto unsupported;
break;
case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
@@ -2797,7 +2876,8 @@ static void mt753x_phylink_mac_link_up(s
@@ -2985,7 +3064,8 @@ static void mt753x_phylink_mac_link_up(s
/* MT753x MAC works in 1G full duplex mode for all up-clocked
* variants.
*/
@ -314,7 +314,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
(phy_interface_mode_is_8023z(interface))) {
speed = SPEED_1000;
duplex = DUPLEX_FULL;
@@ -2877,6 +2957,21 @@ mt7531_cpu_port_config(struct dsa_switch
@@ -3065,6 +3145,21 @@ mt7531_cpu_port_config(struct dsa_switch
return 0;
}
@ -336,7 +336,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
@@ -3019,6 +3114,27 @@ static int mt753x_set_mac_eee(struct dsa
@@ -3207,6 +3302,27 @@ static int mt753x_set_mac_eee(struct dsa
return 0;
}
@ -364,7 +364,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt753x_setup,
@@ -3087,6 +3203,17 @@ const struct mt753x_info mt753x_table[]
@@ -3276,6 +3392,17 @@ const struct mt753x_info mt753x_table[]
.mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_config = mt7531_mac_config,
},
@ -392,9 +392,9 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
#define NUM_TRGMII_CTRL 5
@@ -54,11 +55,11 @@ enum mt753x_id {
#define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16)
@@ -59,11 +60,11 @@ enum mt753x_id {
#define MT7531_CPU_PMAP_MASK GENMASK(7, 0)
#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x)
-#define MT753X_MIRROR_REG(id) (((id) == ID_MT7531) ? \
+#define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
@ -407,7 +407,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
MT7531_MIRROR_MASK : MIRROR_MASK)
/* Registers for BPDU and PAE frame control*/
@@ -322,9 +323,8 @@ enum mt7530_vlan_port_acc_frm {
@@ -332,9 +333,8 @@ enum mt7530_vlan_port_acc_frm {
MT7531_FORCE_DPX | \
MT7531_FORCE_RX_FC | \
MT7531_FORCE_TX_FC)

View File

@ -73,7 +73,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3081,6 +3081,12 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3269,6 +3269,12 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
@ -88,7 +88,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -768,10 +768,10 @@ struct mt753x_info {
@@ -779,10 +779,10 @@ struct mt753x_info {
* registers
* @p6_interface Holding the current port 6 interface
* @p5_intf_sel: Holding the current port 5 interface select
@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
*/
struct mt7530_priv {
struct device *dev;
@@ -790,7 +790,6 @@ struct mt7530_priv {
@@ -801,7 +801,6 @@ struct mt7530_priv {
unsigned int p5_intf_sel;
u8 mirror_rx;
u8 mirror_tx;
@ -108,7 +108,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
struct mt7530_port ports[MT7530_NUM_PORTS];
struct mt753x_pcs pcs[MT7530_NUM_PORTS];
/* protect among processes for registers access*/
@@ -798,6 +797,7 @@ struct mt7530_priv {
@@ -809,6 +808,7 @@ struct mt7530_priv {
int irq;
struct irq_domain *irq_domain;
u32 irq_enable;

View File

@ -1,79 +0,0 @@
From 4b11e3eb0eb7245a0d22a5dc4161c54eea42910c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Sat, 17 Jun 2023 09:26:44 +0300
Subject: [PATCH 16/48] net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU
frames (further restricted by PCR_MATRIX).
Currently the driver sets the first CPU port as the single port in this bit
mask, which works fine regardless of whether the device tree defines port
5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's
logic of picking the first CPU port as the CPU port that all user ports are
affine to, by default.
An upcoming change would like to influence DSA's selection of the default
CPU port to no longer be the first one, and in that case, this logic needs
adaptation.
Since there is no observed leakage or duplication of frames if all CPU
ports are defined in this bit mask, simply include them all.
Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk>
Suggested-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/mt7530.c | 15 +++++++--------
drivers/net/dsa/mt7530.h | 1 +
2 files changed, 8 insertions(+), 8 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1069,6 +1069,13 @@ mt753x_cpu_port_enable(struct dsa_switch
if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
+ /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
+ * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
+ * is affine to the inbound user port.
+ */
+ if (priv->id == ID_MT7531 || priv->id == ID_MT7988)
+ mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
+
/* CPU port gets connected to all user ports of
* the switch.
*/
@@ -2411,16 +2418,8 @@ static int
mt7531_setup_common(struct dsa_switch *ds)
{
struct mt7530_priv *priv = ds->priv;
- struct dsa_port *cpu_dp;
int ret, i;
- /* BPDU to CPU port */
- dsa_switch_for_each_cpu_port(cpu_dp, ds) {
- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
- BIT(cpu_dp->index));
- break;
- }
-
mt753x_trap_frames(priv);
/* Enable and reset MIB counters */
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -54,6 +54,7 @@ enum mt753x_id {
#define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK)
#define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16)
#define MT7531_CPU_PMAP_MASK GENMASK(7, 0)
+#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x)
#define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
MT7531_CFC : MT7530_MFC)

View File

@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3036,7 +3036,7 @@ static void mt7530_pcs_get_state(struct
@@ -3225,7 +3225,7 @@ static void mt7530_pcs_get_state(struct
state->pause |= MLO_PAUSE_TX;
}
@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
phy_interface_t interface,
const unsigned long *advertising,
bool permit_pause_to_mac)
@@ -3064,6 +3064,7 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3253,6 +3253,7 @@ mt753x_setup(struct dsa_switch *ds)
/* Initialise the PCS devices */
for (i = 0; i < priv->ds->num_ports; i++) {
priv->pcs[i].pcs.ops = priv->info->pcs_ops;

View File

@ -24,7 +24,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2851,15 +2851,6 @@ static void mt753x_phylink_mac_link_down
@@ -3040,15 +3040,6 @@ static void mt753x_phylink_mac_link_down
mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
}
@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port,
unsigned int mode,
phy_interface_t interface,
@@ -2948,8 +2939,6 @@ mt7531_cpu_port_config(struct dsa_switch
@@ -3137,8 +3128,6 @@ mt7531_cpu_port_config(struct dsa_switch
return ret;
mt7530_write(priv, MT7530_PMCR_P(port),
PMCR_CPU_PORT_SETTING(priv->id));

View File

@ -28,7 +28,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -829,8 +829,7 @@ mt7530_get_strings(struct dsa_switch *ds
@@ -843,8 +843,7 @@ mt7530_get_strings(struct dsa_switch *ds
return;
for (i = 0; i < ARRAY_SIZE(mt7530_mib); i++)

View File

@ -46,7 +46,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2175,24 +2175,40 @@ mt7530_free_irq_common(struct mt7530_pri
@@ -2350,24 +2350,40 @@ mt7530_free_irq_common(struct mt7530_pri
static void
mt7530_free_irq(struct mt7530_priv *priv)
{
@ -92,7 +92,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
bus->priv = priv;
bus->name = KBUILD_MODNAME "-mii";
snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++);
@@ -2201,16 +2217,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr
@@ -2376,16 +2392,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr
bus->parent = dev;
bus->phy_mask = ~ds->phys_mii_mask;

View File

@ -22,7 +22,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2883,8 +2883,7 @@ static void mt753x_phylink_mac_link_up(s
@@ -3072,8 +3072,7 @@ static void mt753x_phylink_mac_link_up(s
/* MT753x MAC works in 1G full duplex mode for all up-clocked
* variants.
*/

View File

@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1064,10 +1064,6 @@ mt753x_cpu_port_enable(struct dsa_switch
@@ -1239,10 +1239,6 @@ mt753x_cpu_port_enable(struct dsa_switch
mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |
UNU_FFP(BIT(port)));
@ -46,10 +46,10 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
- if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
- mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
-
/* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
* the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
* is affine to the inbound user port.
@@ -3125,6 +3121,36 @@ static int mt753x_set_mac_eee(struct dsa
/* Add the CPU port to the CPU port bitmap for MT7531. Trapped frames
* will be forwarded to the CPU port that is affine to the inbound user
* port.
@@ -3314,6 +3310,36 @@ static int mt753x_set_mac_eee(struct dsa
return 0;
}
@ -86,7 +86,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
{
return 0;
@@ -3179,6 +3205,7 @@ const struct dsa_switch_ops mt7530_switc
@@ -3369,6 +3395,7 @@ const struct dsa_switch_ops mt7530_switc
.phylink_mac_link_up = mt753x_phylink_mac_link_up,
.get_mac_eee = mt753x_get_mac_eee,
.set_mac_eee = mt753x_set_mac_eee,
@ -96,7 +96,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -41,8 +41,8 @@ enum mt753x_id {
@@ -45,8 +45,8 @@ enum mt753x_id {
#define UNU_FFP(x) (((x) & 0xff) << 8)
#define UNU_FFP_MASK UNU_FFP(~0)
#define CPU_EN BIT(7)
@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
#define MIRROR_EN BIT(3)
#define MIRROR_PORT(x) ((x) & 0x7)
#define MIRROR_MASK 0x7
@@ -773,6 +773,7 @@ struct mt753x_info {
@@ -783,6 +783,7 @@ struct mt753x_info {
* @irq_domain: IRQ domain of the switch irq_chip
* @irq_enable: IRQ enable bits, synced to SYS_INT_EN
* @create_sgmii: Pointer to function creating SGMII PCS instance(s)
@ -115,7 +115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
*/
struct mt7530_priv {
struct device *dev;
@@ -799,6 +800,7 @@ struct mt7530_priv {
@@ -809,6 +810,7 @@ struct mt7530_priv {
struct irq_domain *irq_domain;
u32 irq_enable;
int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii);

View File

@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -703,7 +703,7 @@ struct mt7530_port {
@@ -713,7 +713,7 @@ struct mt7530_port {
/* Port 5 interface select definitions */
enum p5_interface_select {
@ -34,7 +34,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
P5_INTF_SEL_PHY_P0,
P5_INTF_SEL_PHY_P4,
P5_INTF_SEL_GMAC5,
@@ -789,7 +789,7 @@ struct mt7530_priv {
@@ -799,7 +799,7 @@ struct mt7530_priv {
bool mcm;
phy_interface_t p6_interface;
phy_interface_t p5_interface;

View File

@ -65,7 +65,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
GFP_KERNEL);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -473,15 +473,6 @@ mt7530_pad_clk_setup(struct dsa_switch *
@@ -487,15 +487,6 @@ mt7530_pad_clk_setup(struct dsa_switch *
return 0;
}
@ -81,7 +81,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static int
mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
{
@@ -496,9 +487,6 @@ mt7531_pll_setup(struct mt7530_priv *pri
@@ -510,9 +501,6 @@ mt7531_pll_setup(struct mt7530_priv *pri
u32 xtal;
u32 val;
@ -91,7 +91,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
val = mt7530_read(priv, MT7531_CREV);
top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
hwstrap = mt7530_read(priv, MT7531_HWTRAP);
@@ -913,8 +901,6 @@ static const char *p5_intf_modes(unsigne
@@ -927,8 +915,6 @@ static const char *p5_intf_modes(unsigne
return "PHY P4";
case P5_INTF_SEL_GMAC5:
return "GMAC5";
@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
default:
return "unknown";
}
@@ -2515,6 +2501,12 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2697,6 +2683,12 @@ mt7531_setup(struct dsa_switch *ds)
return -ENODEV;
}
@ -113,7 +113,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* all MACs must be forced link-down before sw reset */
for (i = 0; i < MT7530_NUM_PORTS; i++)
mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
@@ -2524,21 +2516,18 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2706,21 +2698,18 @@ mt7531_setup(struct dsa_switch *ds)
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
SYS_CTRL_REG_RST);
@ -141,7 +141,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
MT7531_GPIO0_INTERRUPT);
@@ -2598,11 +2587,6 @@ static void mt7530_mac_port_get_caps(str
@@ -2787,11 +2776,6 @@ static void mt7530_mac_port_get_caps(str
}
}
@ -153,7 +153,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
@@ -2615,7 +2599,7 @@ static void mt7531_mac_port_get_caps(str
@@ -2804,7 +2788,7 @@ static void mt7531_mac_port_get_caps(str
break;
case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
@ -162,7 +162,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
phy_interface_set_rgmii(config->supported_interfaces);
break;
}
@@ -2682,7 +2666,7 @@ static int mt7531_rgmii_setup(struct mt7
@@ -2871,7 +2855,7 @@ static int mt7531_rgmii_setup(struct mt7
{
u32 val;
@ -171,7 +171,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
dev_err(priv->dev, "RGMII mode is not available for port %d\n",
port);
return -EINVAL;
@@ -2925,7 +2909,7 @@ mt7531_cpu_port_config(struct dsa_switch
@@ -3114,7 +3098,7 @@ mt7531_cpu_port_config(struct dsa_switch
switch (port) {
case 5:
@ -180,7 +180,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
interface = PHY_INTERFACE_MODE_RGMII;
else
interface = PHY_INTERFACE_MODE_2500BASEX;
@@ -3083,7 +3067,7 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3272,7 +3256,7 @@ mt753x_setup(struct dsa_switch *ds)
mt7530_free_irq_common(priv);
if (priv->create_sgmii) {
@ -191,7 +191,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -707,7 +707,6 @@ enum p5_interface_select {
@@ -717,7 +717,6 @@ enum p5_interface_select {
P5_INTF_SEL_PHY_P0,
P5_INTF_SEL_PHY_P4,
P5_INTF_SEL_GMAC5,
@ -199,7 +199,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
};
struct mt7530_priv;
@@ -769,6 +768,8 @@ struct mt753x_info {
@@ -779,6 +778,8 @@ struct mt753x_info {
* registers
* @p6_interface Holding the current port 6 interface
* @p5_intf_sel: Holding the current port 5 interface select
@ -208,7 +208,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* @irq: IRQ number of the switch
* @irq_domain: IRQ domain of the switch irq_chip
* @irq_enable: IRQ enable bits, synced to SYS_INT_EN
@@ -790,6 +791,7 @@ struct mt7530_priv {
@@ -800,6 +801,7 @@ struct mt7530_priv {
phy_interface_t p6_interface;
phy_interface_t p5_interface;
enum p5_interface_select p5_intf_sel;
@ -216,7 +216,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
u8 mirror_rx;
u8 mirror_tx;
struct mt7530_port ports[MT7530_NUM_PORTS];
@@ -799,7 +801,7 @@ struct mt7530_priv {
@@ -809,7 +811,7 @@ struct mt7530_priv {
int irq;
struct irq_domain *irq_domain;
u32 irq_enable;

View File

@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2565,12 +2565,14 @@ static void mt7530_mac_port_get_caps(str
@@ -2754,12 +2754,14 @@ static void mt7530_mac_port_get_caps(str
struct phylink_config *config)
{
switch (port) {
@ -54,7 +54,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
phy_interface_set_rgmii(config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_MII,
config->supported_interfaces);
@@ -2578,7 +2580,8 @@ static void mt7530_mac_port_get_caps(str
@@ -2767,7 +2769,8 @@ static void mt7530_mac_port_get_caps(str
config->supported_interfaces);
break;
@ -64,7 +64,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
__set_bit(PHY_INTERFACE_MODE_RGMII,
config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_TRGMII,
@@ -2593,19 +2596,24 @@ static void mt7531_mac_port_get_caps(str
@@ -2782,19 +2785,24 @@ static void mt7531_mac_port_get_caps(str
struct mt7530_priv *priv = ds->priv;
switch (port) {
@ -92,7 +92,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
__set_bit(PHY_INTERFACE_MODE_SGMII,
config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_1000BASEX,
@@ -2624,11 +2632,13 @@ static void mt7988_mac_port_get_caps(str
@@ -2813,11 +2821,13 @@ static void mt7988_mac_port_get_caps(str
phy_interface_zero(config->supported_interfaces);
switch (port) {
@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
case 6:
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces);
@@ -2792,12 +2802,12 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2981,12 +2991,12 @@ mt753x_phylink_mac_config(struct dsa_swi
u32 mcr_cur, mcr_new;
switch (port) {
@ -122,7 +122,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (priv->p5_interface == state->interface)
break;
@@ -2807,7 +2817,7 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2996,7 +3006,7 @@ mt753x_phylink_mac_config(struct dsa_swi
if (priv->p5_intf_sel != P5_DISABLED)
priv->p5_interface = state->interface;
break;

View File

@ -52,7 +52,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2353,16 +2353,15 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2532,16 +2532,15 @@ mt7530_setup(struct dsa_switch *ds)
return ret;
/* Setup port 5 */
@ -75,7 +75,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
for_each_child_of_node(dn, mac_np) {
if (!of_device_is_compatible(mac_np,
"mediatek,eth-mac"))
@@ -2393,6 +2392,8 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2572,6 +2571,8 @@ mt7530_setup(struct dsa_switch *ds)
of_node_put(phy_node);
break;
}
@ -84,7 +84,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
#ifdef CONFIG_GPIOLIB
@@ -2403,8 +2404,6 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2582,8 +2583,6 @@ mt7530_setup(struct dsa_switch *ds)
}
#endif /* CONFIG_GPIOLIB */

View File

@ -31,7 +31,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -971,8 +971,6 @@ static void mt7530_setup_port5(struct ds
@@ -985,8 +985,6 @@ static void mt7530_setup_port5(struct ds
dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n",
val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface));

View File

@ -30,7 +30,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -935,9 +935,6 @@ static void mt7530_setup_port5(struct ds
@@ -949,9 +949,6 @@ static void mt7530_setup_port5(struct ds
/* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */
val &= ~MHWTRAP_P5_DIS;
break;
@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
default:
dev_err(ds->dev, "Unsupported p5_intf_sel %d\n",
priv->p5_intf_sel);
@@ -2358,8 +2355,6 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2537,8 +2534,6 @@ mt7530_setup(struct dsa_switch *ds)
* Set priv->p5_intf_sel to the appropriate value if PHY muxing
* is detected.
*/
@ -49,7 +49,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
for_each_child_of_node(dn, mac_np) {
if (!of_device_is_compatible(mac_np,
"mediatek,eth-mac"))
@@ -2391,7 +2386,9 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2570,7 +2565,9 @@ mt7530_setup(struct dsa_switch *ds)
break;
}

View File

@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -936,9 +936,7 @@ static void mt7530_setup_port5(struct ds
@@ -950,9 +950,7 @@ static void mt7530_setup_port5(struct ds
val &= ~MHWTRAP_P5_DIS;
break;
default:
@ -48,7 +48,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
/* Setup RGMII settings */
@@ -968,7 +966,6 @@ static void mt7530_setup_port5(struct ds
@@ -982,7 +980,6 @@ static void mt7530_setup_port5(struct ds
dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n",
val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface));

View File

@ -24,7 +24,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -408,13 +408,6 @@ mt7530_pad_clk_setup(struct dsa_switch *
@@ -422,13 +422,6 @@ mt7530_pad_clk_setup(struct dsa_switch *
xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK;
@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
switch (interface) {
case PHY_INTERFACE_MODE_RGMII:
trgint = 0;
@@ -2286,6 +2279,12 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2461,6 +2454,12 @@ mt7530_setup(struct dsa_switch *ds)
return -ENODEV;
}

View File

@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -404,65 +404,54 @@ static int
@@ -418,65 +418,54 @@ static int
mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface)
{
struct mt7530_priv *priv = ds->priv;

View File

@ -47,7 +47,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -400,8 +400,8 @@ static void mt7530_pll_setup(struct mt75
@@ -414,8 +414,8 @@ mt753x_preferred_default_local_cpu_port(
}
/* Setup port 6 interface mode and TRGMII TX circuit */
@ -58,7 +58,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
{
struct mt7530_priv *priv = ds->priv;
u32 ncpo1, ssc_delta, xtal;
@@ -412,7 +412,7 @@ mt7530_pad_clk_setup(struct dsa_switch *
@@ -426,7 +426,7 @@ mt7530_pad_clk_setup(struct dsa_switch *
if (interface == PHY_INTERFACE_MODE_RGMII) {
mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK,
P6_INTF_MODE(0));
@ -67,7 +67,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1));
@@ -451,7 +451,11 @@ mt7530_pad_clk_setup(struct dsa_switch *
@@ -465,7 +465,11 @@ mt7530_pad_clk_setup(struct dsa_switch *
/* Enable the MT7530 TRGMII clocks */
core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN);
@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
return 0;
}
@@ -2640,11 +2644,10 @@ mt7530_mac_config(struct dsa_switch *ds,
@@ -2829,11 +2833,10 @@ mt7530_mac_config(struct dsa_switch *ds,
{
struct mt7530_priv *priv = ds->priv;

View File

@ -28,7 +28,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -453,18 +453,6 @@ mt7530_setup_port6(struct dsa_switch *ds
@@ -467,18 +467,6 @@ mt7530_setup_port6(struct dsa_switch *ds
core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN);
}
@ -47,7 +47,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static void
mt7531_pll_setup(struct mt7530_priv *priv)
{
@@ -2631,14 +2619,6 @@ static void mt7988_mac_port_get_caps(str
@@ -2820,14 +2808,6 @@ static void mt7988_mac_port_get_caps(str
}
static int
@ -62,7 +62,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
{
@@ -2803,8 +2783,6 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2992,8 +2972,6 @@ mt753x_phylink_mac_config(struct dsa_swi
if (priv->p6_interface == state->interface)
break;
@ -71,7 +71,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (mt753x_mac_config(ds, port, mode, state) < 0)
goto unsupported;
@@ -3127,11 +3105,6 @@ mt753x_conduit_state_change(struct dsa_s
@@ -3316,11 +3294,6 @@ mt753x_conduit_state_change(struct dsa_s
mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val);
}
@ -83,7 +83,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static int mt7988_setup(struct dsa_switch *ds)
{
struct mt7530_priv *priv = ds->priv;
@@ -3192,7 +3165,6 @@ const struct mt753x_info mt753x_table[]
@@ -3382,7 +3355,6 @@ const struct mt753x_info mt753x_table[]
.sw_setup = mt7530_setup,
.phy_read = mt7530_phy_read,
.phy_write = mt7530_phy_write,
@ -91,7 +91,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_config = mt7530_mac_config,
},
@@ -3202,7 +3174,6 @@ const struct mt753x_info mt753x_table[]
@@ -3392,7 +3364,6 @@ const struct mt753x_info mt753x_table[]
.sw_setup = mt7530_setup,
.phy_read = mt7530_phy_read,
.phy_write = mt7530_phy_write,
@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_config = mt7530_mac_config,
},
@@ -3212,7 +3183,6 @@ const struct mt753x_info mt753x_table[]
@@ -3402,7 +3373,6 @@ const struct mt753x_info mt753x_table[]
.sw_setup = mt7531_setup,
.phy_read = mt7531_ind_phy_read,
.phy_write = mt7531_ind_phy_write,
@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.cpu_port_config = mt7531_cpu_port_config,
.mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_config = mt7531_mac_config,
@@ -3223,7 +3193,6 @@ const struct mt753x_info mt753x_table[]
@@ -3413,7 +3383,6 @@ const struct mt753x_info mt753x_table[]
.sw_setup = mt7988_setup,
.phy_read = mt7531_ind_phy_read,
.phy_write = mt7531_ind_phy_write,
@ -115,7 +115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.cpu_port_config = mt7988_cpu_port_config,
.mac_port_get_caps = mt7988_mac_port_get_caps,
.mac_port_config = mt7988_mac_config,
@@ -3253,9 +3222,8 @@ mt7530_probe_common(struct mt7530_priv *
@@ -3443,9 +3412,8 @@ mt7530_probe_common(struct mt7530_priv *
/* Sanity check if these required device operations are filled
* properly.
*/
@ -129,7 +129,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -722,8 +722,6 @@ struct mt753x_pcs {
@@ -732,8 +732,6 @@ struct mt753x_pcs {
* @sw_setup: Holding the handler to a device initialization
* @phy_read: Holding the way reading PHY port
* @phy_write: Holding the way writing PHY port
@ -138,7 +138,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* @phy_mode_supported: Check if the PHY type is being supported on a certain
* port
* @mac_port_validate: Holding the way to set addition validate type for a
@@ -739,7 +737,6 @@ struct mt753x_info {
@@ -749,7 +747,6 @@ struct mt753x_info {
int (*sw_setup)(struct dsa_switch *ds);
int (*phy_read)(struct mt7530_priv *priv, int port, int regnum);
int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);

View File

@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2604,7 +2604,7 @@ static void mt7988_mac_port_get_caps(str
@@ -2793,7 +2793,7 @@ static void mt7988_mac_port_get_caps(str
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */

View File

@ -27,7 +27,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2600,8 +2600,6 @@ static void mt7531_mac_port_get_caps(str
@@ -2789,8 +2789,6 @@ static void mt7531_mac_port_get_caps(str
static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{

View File

@ -33,7 +33,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2683,17 +2683,6 @@ static bool mt753x_is_mac_port(u32 port)
@@ -2872,17 +2872,6 @@ static bool mt753x_is_mac_port(u32 port)
}
static int
@ -51,7 +51,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
{
@@ -2733,6 +2722,9 @@ mt753x_mac_config(struct dsa_switch *ds,
@@ -2922,6 +2911,9 @@ mt753x_mac_config(struct dsa_switch *ds,
{
struct mt7530_priv *priv = ds->priv;
@ -61,7 +61,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
return priv->info->mac_port_config(ds, port, mode, state->interface);
}
@@ -3193,7 +3185,6 @@ const struct mt753x_info mt753x_table[]
@@ -3383,7 +3375,6 @@ const struct mt753x_info mt753x_table[]
.phy_write = mt7531_ind_phy_write,
.cpu_port_config = mt7988_cpu_port_config,
.mac_port_get_caps = mt7988_mac_port_get_caps,
@ -69,7 +69,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
},
};
EXPORT_SYMBOL_GPL(mt753x_table);
@@ -3221,8 +3212,7 @@ mt7530_probe_common(struct mt7530_priv *
@@ -3411,8 +3402,7 @@ mt7530_probe_common(struct mt7530_priv *
* properly.
*/
if (!priv->info->sw_setup || !priv->info->phy_read ||

View File

@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2084,7 +2084,7 @@ mt7530_setup_irq(struct mt7530_priv *pri
@@ -2259,7 +2259,7 @@ mt7530_setup_irq(struct mt7530_priv *pri
}
/* This register must be set for MT7530 to properly fire interrupts */

View File

@ -22,7 +22,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2478,14 +2478,12 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2660,14 +2660,12 @@ mt7531_setup(struct dsa_switch *ds)
val = mt7530_read(priv, MT7531_TOP_SIG_SR);
priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);

View File

@ -36,7 +36,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2614,7 +2614,7 @@ static void mt7988_mac_port_get_caps(str
@@ -2803,7 +2803,7 @@ static void mt7988_mac_port_get_caps(str
}
}
@ -45,7 +45,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
{
@@ -2624,22 +2624,14 @@ mt7530_mac_config(struct dsa_switch *ds,
@@ -2813,22 +2813,14 @@ mt7530_mac_config(struct dsa_switch *ds,
mt7530_setup_port5(priv->ds, interface);
else if (port == 6)
mt7530_setup_port6(priv->ds, interface);
@ -71,7 +71,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
val = mt7530_read(priv, MT7531_CLKGEN_CTRL);
val |= GP_CLK_EN;
val &= ~GP_MODE_MASK;
@@ -2667,20 +2659,14 @@ static int mt7531_rgmii_setup(struct mt7
@@ -2856,20 +2848,14 @@ static int mt7531_rgmii_setup(struct mt7
case PHY_INTERFACE_MODE_RGMII_ID:
break;
default:
@ -95,7 +95,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
{
@@ -2688,42 +2674,21 @@ mt7531_mac_config(struct dsa_switch *ds,
@@ -2877,42 +2863,21 @@ mt7531_mac_config(struct dsa_switch *ds,
struct phy_device *phydev;
struct dsa_port *dp;
@ -143,7 +143,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
}
static struct phylink_pcs *
@@ -2752,17 +2717,11 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2941,17 +2906,11 @@ mt753x_phylink_mac_config(struct dsa_swi
u32 mcr_cur, mcr_new;
switch (port) {
@ -162,7 +162,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
if (priv->p5_intf_sel != P5_DISABLED)
priv->p5_interface = state->interface;
@@ -2771,16 +2730,10 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2960,16 +2919,10 @@ mt753x_phylink_mac_config(struct dsa_swi
if (priv->p6_interface == state->interface)
break;
@ -180,7 +180,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
}
mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
@@ -2863,7 +2816,6 @@ mt7531_cpu_port_config(struct dsa_switch
@@ -3052,7 +3005,6 @@ mt7531_cpu_port_config(struct dsa_switch
struct mt7530_priv *priv = ds->priv;
phy_interface_t interface;
int speed;
@ -188,7 +188,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
switch (port) {
case 5:
@@ -2888,9 +2840,8 @@ mt7531_cpu_port_config(struct dsa_switch
@@ -3077,9 +3029,8 @@ mt7531_cpu_port_config(struct dsa_switch
else
speed = SPEED_1000;
@ -202,7 +202,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL,
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -743,9 +743,9 @@ struct mt753x_info {
@@ -753,9 +753,9 @@ struct mt753x_info {
void (*mac_port_validate)(struct dsa_switch *ds, int port,
phy_interface_t interface,
unsigned long *supported);

View File

@ -57,8 +57,8 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -995,18 +995,10 @@ mt753x_trap_frames(struct mt7530_priv *p
MT753X_BPDU_CPU_ONLY);
@@ -1170,18 +1170,10 @@ mt753x_trap_frames(struct mt7530_priv *p
MT753X_BPDU_CPU_ONLY);
}
-static int
@ -77,7 +77,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
/* Enable Mediatek header mode on the cpu port */
mt7530_write(priv, MT7530_PVC_P(port),
@@ -1032,8 +1024,6 @@ mt753x_cpu_port_enable(struct dsa_switch
@@ -1207,8 +1199,6 @@ mt753x_cpu_port_enable(struct dsa_switch
/* Set to fallback mode for independent VLAN learning */
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
MT7530_PORT_FALLBACK_MODE);
@ -86,16 +86,16 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
}
static int
@@ -2288,8 +2278,6 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2461,8 +2451,6 @@ mt7530_setup(struct dsa_switch *ds)
val |= MHWTRAP_MANUAL;
mt7530_write(priv, MT7530_MHWTRAP, val);
- priv->p6_interface = PHY_INTERFACE_MODE_NA;
-
mt753x_trap_frames(priv);
if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_40MHZ)
mt7530_pll_setup(priv);
/* Enable and reset MIB counters */
@@ -2304,9 +2292,7 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2480,9 +2468,7 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
if (dsa_is_cpu_port(ds, i)) {
@ -106,7 +106,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
} else {
mt7530_port_disable(ds, i);
@@ -2410,9 +2396,7 @@ mt7531_setup_common(struct dsa_switch *d
@@ -2589,9 +2575,7 @@ mt7531_setup_common(struct dsa_switch *d
mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR);
if (dsa_is_cpu_port(ds, i)) {
@ -117,7 +117,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
} else {
mt7530_port_disable(ds, i);
@@ -2501,10 +2485,6 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2683,10 +2667,6 @@ mt7531_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
MT7531_GPIO0_INTERRUPT);
@ -125,10 +125,10 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
- priv->p5_interface = PHY_INTERFACE_MODE_NA;
- priv->p6_interface = PHY_INTERFACE_MODE_NA;
-
/* Enable PHY core PLL, since phy_device has not yet been created
* provided for phy_[read,write]_mmd_indirect is called, we provide
* our own mt7531_ind_mmd_phy_[read,write] to complete this
@@ -2716,26 +2696,9 @@ mt753x_phylink_mac_config(struct dsa_swi
/* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since
* phy_device has not yet been created provided for
* phy_[read,write]_mmd_indirect is called, we provide our own
@@ -2905,26 +2885,9 @@ mt753x_phylink_mac_config(struct dsa_swi
struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new;
@ -156,7 +156,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
mcr_new = mcr_cur;
mcr_new &= ~PMCR_LINK_SETTINGS_MASK;
@@ -2771,17 +2734,10 @@ static void mt753x_phylink_mac_link_up(s
@@ -2960,17 +2923,10 @@ static void mt753x_phylink_mac_link_up(s
mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
@ -176,7 +176,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mcr |= PMCR_FORCE_SPEED_1000;
break;
case SPEED_100:
@@ -2799,6 +2755,7 @@ static void mt753x_phylink_mac_link_up(s
@@ -2988,6 +2944,7 @@ static void mt753x_phylink_mac_link_up(s
if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) {
switch (speed) {
case SPEED_1000:
@ -184,7 +184,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mcr |= PMCR_FORCE_EEE1G;
break;
case SPEED_100:
@@ -2810,61 +2767,6 @@ static void mt753x_phylink_mac_link_up(s
@@ -2999,61 +2956,6 @@ static void mt753x_phylink_mac_link_up(s
mt7530_set(priv, MT7530_PMCR_P(port), mcr);
}
@ -246,7 +246,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
@@ -3122,7 +3024,6 @@ const struct mt753x_info mt753x_table[]
@@ -3312,7 +3214,6 @@ const struct mt753x_info mt753x_table[]
.sw_setup = mt7531_setup,
.phy_read = mt7531_ind_phy_read,
.phy_write = mt7531_ind_phy_write,
@ -254,7 +254,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
.mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_config = mt7531_mac_config,
},
@@ -3132,7 +3033,6 @@ const struct mt753x_info mt753x_table[]
@@ -3322,7 +3223,6 @@ const struct mt753x_info mt753x_table[]
.sw_setup = mt7988_setup,
.phy_read = mt7531_ind_phy_read,
.phy_write = mt7531_ind_phy_write,
@ -264,7 +264,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
};
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -331,13 +331,6 @@ enum mt7530_vlan_port_acc_frm {
@@ -340,13 +340,6 @@ enum mt7530_vlan_port_acc_frm {
PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
PMCR_FORCE_FDX | PMCR_FORCE_LNK | \
PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100)
@ -278,7 +278,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
#define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24)
@@ -737,7 +730,6 @@ struct mt753x_info {
@@ -747,7 +740,6 @@ struct mt753x_info {
int (*sw_setup)(struct dsa_switch *ds);
int (*phy_read)(struct mt7530_priv *priv, int port, int regnum);
int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);
@ -286,7 +286,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
void (*mac_port_get_caps)(struct dsa_switch *ds, int port,
struct phylink_config *config);
void (*mac_port_validate)(struct dsa_switch *ds, int port,
@@ -763,7 +755,6 @@ struct mt753x_info {
@@ -773,7 +765,6 @@ struct mt753x_info {
* @ports: Holding the state among ports
* @reg_mutex: The lock for protecting among process accessing
* registers
@ -294,7 +294,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* @p5_intf_sel: Holding the current port 5 interface select
* @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch
* has got SGMII
@@ -785,8 +776,6 @@ struct mt7530_priv {
@@ -795,8 +786,6 @@ struct mt7530_priv {
const struct mt753x_info *info;
unsigned int id;
bool mcm;

View File

@ -18,7 +18,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2661,16 +2661,6 @@ mt7531_mac_config(struct dsa_switch *ds,
@@ -2850,16 +2850,6 @@ mt7531_mac_config(struct dsa_switch *ds,
}
}
@ -35,7 +35,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
static struct phylink_pcs *
mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port,
phy_interface_t interface)
@@ -2696,8 +2686,8 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2885,8 +2875,8 @@ mt753x_phylink_mac_config(struct dsa_swi
struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new;

View File

@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2845,17 +2845,9 @@ static int
@@ -3034,17 +3034,9 @@ static int
mt753x_setup(struct dsa_switch *ds)
{
struct mt7530_priv *priv = ds->priv;
@ -40,7 +40,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
if (ret)
return ret;
@@ -2867,6 +2859,14 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3056,6 +3048,14 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);

View File

@ -24,7 +24,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1047,7 +1047,6 @@ mt7530_port_enable(struct dsa_switch *ds
@@ -1222,7 +1222,6 @@ mt7530_port_enable(struct dsa_switch *ds
priv->ports[port].enable = true;
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
priv->ports[port].pm);
@ -32,7 +32,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mutex_unlock(&priv->reg_mutex);
@@ -1067,7 +1066,6 @@ mt7530_port_disable(struct dsa_switch *d
@@ -1242,7 +1241,6 @@ mt7530_port_disable(struct dsa_switch *d
priv->ports[port].enable = false;
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
PCR_MATRIX_CLR);
@ -40,7 +40,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mutex_unlock(&priv->reg_mutex);
}
@@ -2284,6 +2282,12 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2460,6 +2458,12 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_mib_reset(ds);
for (i = 0; i < MT7530_NUM_PORTS; i++) {
@ -53,7 +53,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
/* Disable forwarding by default on all ports */
mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
PCR_MATRIX_CLR);
@@ -2386,6 +2390,12 @@ mt7531_setup_common(struct dsa_switch *d
@@ -2565,6 +2569,12 @@ mt7531_setup_common(struct dsa_switch *d
UNU_FFP_MASK);
for (i = 0; i < MT7530_NUM_PORTS; i++) {

View File

@ -45,7 +45,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2694,23 +2694,13 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2883,23 +2883,13 @@ mt753x_phylink_mac_config(struct dsa_swi
const struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;
@ -72,7 +72,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port,
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -324,8 +324,6 @@ enum mt7530_vlan_port_acc_frm {
@@ -333,8 +333,6 @@ enum mt7530_vlan_port_acc_frm {
MT7531_FORCE_DPX | \
MT7531_FORCE_RX_FC | \
MT7531_FORCE_TX_FC)

View File

@ -1,74 +0,0 @@
From cfa7c85f92cd3814ad9748eb1ab25658c7f7cc67 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Wed, 20 Mar 2024 23:45:30 +0300
Subject: [PATCH 48/48] net: dsa: mt7530: fix improper frames on all 25MHz and
40MHz XTAL MT7530
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The MT7530 switch after reset initialises with a core clock frequency that
works with a 25MHz XTAL connected to it. For 40MHz XTAL, the core clock
frequency must be set to 500MHz.
The mt7530_pll_setup() function is responsible of setting the core clock
frequency. Currently, it runs on MT7530 with 25MHz and 40MHz XTAL. This
causes MT7530 switch with 25MHz XTAL to egress and ingress frames
improperly.
Introduce a check to run it only on MT7530 with 40MHz XTAL.
The core clock frequency is set by writing to a switch PHY's register.
Access to the PHY's register is done via the MDIO bus the switch is also
on. Therefore, it works only when the switch makes switch PHYs listen on
the MDIO bus the switch is on. This is controlled either by the state of
the ESW_P1_LED_1 pin after reset deassertion or modifying bit 5 of the
modifiable trap register.
When ESW_P1_LED_1 is pulled high, PHY indirect access is used. That means
accessing PHY registers via the PHY indirect access control register of the
switch.
When ESW_P1_LED_1 is pulled low, PHY direct access is used. That means
accessing PHY registers via the MDIO bus the switch is on.
For MT7530 switch with 40MHz XTAL on a board with ESW_P1_LED_1 pulled high,
the core clock frequency won't be set to 500MHz, causing the switch to
egress and ingress frames improperly.
Run mt7530_pll_setup() after PHY direct access is set on the modifiable
trap register.
With these two changes, all MT7530 switches with 25MHz and 40MHz, and
P1_LED_1 pulled high or low, will egress and ingress frames properly.
Link: https://github.com/BPI-SINOVOIP/BPI-R2-bsp/blob/4a5dd143f2172ec97a2872fa29c7c4cd520f45b5/linux-mt/drivers/net/ethernet/mediatek/gsw_mt7623.c#L1039
Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Link: https://lore.kernel.org/r/20240320-for-net-mt7530-fix-25mhz-xtal-with-direct-phy-access-v1-1-d92f605f1160@arinc9.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/dsa/mt7530.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2259,8 +2259,6 @@ mt7530_setup(struct dsa_switch *ds)
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
SYS_CTRL_REG_RST);
- mt7530_pll_setup(priv);
-
/* Lower Tx driving for TRGMII path */
for (i = 0; i < NUM_TRGMII_CTRL; i++)
mt7530_write(priv, MT7530_TRGMII_TD_ODT(i),
@@ -2276,6 +2274,9 @@ mt7530_setup(struct dsa_switch *ds)
val |= MHWTRAP_MANUAL;
mt7530_write(priv, MT7530_MHWTRAP, val);
+ if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_40MHZ)
+ mt7530_pll_setup(priv);
+
mt753x_trap_frames(priv);
/* Enable and reset MIB counters */

View File

@ -1,92 +0,0 @@
From ef972fc9f5743da589ce9546dd565d6c56e679b8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Mon, 8 Apr 2024 10:08:53 +0300
Subject: [PATCH 1/2] net: dsa: mt7530: fix enabling EEE on MT7531 switch on
all boards
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features")
brought EEE support but did not enable EEE on MT7531 switch MACs. EEE is
enabled on MT7531 switch MACs by pulling the LAN2LED0 pin low on the board
(bootstrapping), unsetting the EEE_DIS bit on the trap register, or setting
the internal EEE switch bit on the CORE_PLL_GROUP4 register. Thanks to
SkyLake Huang (黃啟澤) from MediaTek for providing information on the
internal EEE switch bit.
There are existing boards that were not designed to pull the pin low.
Because of that, the EEE status currently depends on the board design.
The EEE_DIS bit on the trap pertains to the LAN2LED0 pin which is usually
used to control an LED. Once the bit is unset, the pin will be low. That
will make the active low LED turn on. The pin is controlled by the switch
PHY. It seems that the PHY controls the pin in the way that it inverts the
pin state. That means depending on the wiring of the LED connected to
LAN2LED0 on the board, the LED may be on without an active link.
To not cause this unwanted behaviour whilst enabling EEE on all boards, set
the internal EEE switch bit on the CORE_PLL_GROUP4 register.
My testing on MT7531 shows a certain amount of traffic loss when EEE is
enabled. That said, I haven't come across a board that enables EEE. So
enable EEE on the switch MACs but disable EEE advertisement on the switch
PHYs. This way, we don't change the behaviour of the majority of the boards
that have this switch. The mediatek-ge PHY driver already disables EEE
advertisement on the switch PHYs but my testing shows that it is somehow
enabled afterwards. Disabling EEE advertisement before the PHY driver
initialises keeps it off.
With this change, EEE can now be enabled using ethtool.
Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features")
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
drivers/net/dsa/mt7530.c | 17 ++++++++++++-----
drivers/net/dsa/mt7530.h | 1 +
2 files changed, 13 insertions(+), 5 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2496,18 +2496,25 @@ mt7531_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
MT7531_GPIO0_INTERRUPT);
- /* Enable PHY core PLL, since phy_device has not yet been created
- * provided for phy_[read,write]_mmd_indirect is called, we provide
- * our own mt7531_ind_mmd_phy_[read,write] to complete this
- * function.
+ /* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since
+ * phy_device has not yet been created provided for
+ * phy_[read,write]_mmd_indirect is called, we provide our own
+ * mt7531_ind_mmd_phy_[read,write] to complete this function.
*/
val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR,
MDIO_MMD_VEND2, CORE_PLL_GROUP4);
- val |= MT7531_PHY_PLL_BYPASS_MODE;
+ val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE;
val &= ~MT7531_PHY_PLL_OFF;
mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2,
CORE_PLL_GROUP4, val);
+ /* Disable EEE advertisement on the switch PHYs. */
+ for (i = MT753X_CTRL_PHY_ADDR;
+ i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) {
+ mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV,
+ 0);
+ }
+
mt7531_setup_common(ds);
/* Setup VLAN ID 0 for VLAN-unaware bridges */
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -616,6 +616,7 @@ enum mt7531_clk_skew {
#define RG_SYSPLL_DDSFBK_EN BIT(12)
#define RG_SYSPLL_BIAS_EN BIT(11)
#define RG_SYSPLL_BIAS_LPF_EN BIT(10)
+#define MT7531_RG_SYSPLL_DMY2 BIT(6)
#define MT7531_PHY_PLL_OFF BIT(5)
#define MT7531_PHY_PLL_BYPASS_MODE BIT(4)

View File

@ -1,483 +0,0 @@
From b7427d66cb3d6dca5165de5f7d80d59f08c2795b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Tue, 9 Apr 2024 18:01:14 +0300
Subject: [PATCH 2/2] net: dsa: mt7530: trap link-local frames regardless of ST
Port State
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer
(DLL) of the Open Systems Interconnection basic reference model (OSI/RM)
are described; the medium access control (MAC) and logical link control
(LLC) sublayers. The MAC sublayer is the one facing the physical layer.
In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A
Bridge component comprises a MAC Relay Entity for interconnecting the Ports
of the Bridge, at least two Ports, and higher layer entities with at least
a Spanning Tree Protocol Entity included.
Each Bridge Port also functions as an end station and shall provide the MAC
Service to an LLC Entity. Each instance of the MAC Service is provided to a
distinct LLC Entity that supports protocol identification, multiplexing,
and demultiplexing, for protocol data unit (PDU) transmission and reception
by one or more higher layer entities.
It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC
Entity associated with each Bridge Port is modeled as being directly
connected to the attached Local Area Network (LAN).
On the switch with CPU port architecture, CPU port functions as Management
Port, and the Management Port functionality is provided by software which
functions as an end station. Software is connected to an IEEE 802 LAN that
is wholly contained within the system that incorporates the Bridge.
Software provides access to the LLC Entity associated with each Bridge Port
by the value of the source port field on the special tag on the frame
received by software.
We call frames that carry control information to determine the active
topology and current extent of each Virtual Local Area Network (VLAN),
i.e., spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN
Registration Protocol Data Units (MVRPDUs), and frames from other link
constrained protocols, such as Extensible Authentication Protocol over LAN
(EAPOL) and Link Layer Discovery Protocol (LLDP), link-local frames. They
are not forwarded by a Bridge. Permanently configured entries in the
filtering database (FDB) ensure that such frames are discarded by the
Forwarding Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in
detail:
Each of the reserved MAC addresses specified in Table 8-1
(01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be
permanently configured in the FDB in C-VLAN components and ERs.
Each of the reserved MAC addresses specified in Table 8-2
(01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently
configured in the FDB in S-VLAN components.
Each of the reserved MAC addresses specified in Table 8-3
(01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB
in TPMR components.
The FDB entries for reserved MAC addresses shall specify filtering for all
Bridge Ports and all VIDs. Management shall not provide the capability to
modify or remove entries for reserved MAC addresses.
The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of
propagation of PDUs within a Bridged Network, as follows:
The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that
no conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN)
component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward.
PDUs transmitted using this destination address, or any other addresses
that appear in Table 8-1, Table 8-2, and Table 8-3
(01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can
therefore travel no further than those stations that can be reached via a
single individual LAN from the originating station.
The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an
address that no conformant S-VLAN component, C-VLAN component, or MAC
Bridge can forward; however, this address is relayed by a TPMR component.
PDUs using this destination address, or any of the other addresses that
appear in both Table 8-1 and Table 8-2 but not in Table 8-3
(01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed
by any TPMRs but will propagate no further than the nearest S-VLAN
component, C-VLAN component, or MAC Bridge.
The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an
address that no conformant C-VLAN component, MAC Bridge can forward;
however, it is relayed by TPMR components and S-VLAN components. PDUs
using this destination address, or any of the other addresses that appear
in Table 8-1 but not in either Table 8-2 or Table 8-3
(01-80-C2-00-00-[00,0B,0C,0D,0F]), will be relayed by TPMR components and
S-VLAN components but will propagate no further than the nearest C-VLAN
component or MAC Bridge.
Because the LLC Entity associated with each Bridge Port is provided via CPU
port, we must not filter these frames but forward them to CPU port.
In a Bridge, the transmission Port is majorly decided by ingress and egress
rules, FDB, and spanning tree Port State functions of the Forwarding
Process. For link-local frames, only CPU port should be designated as
destination port in the FDB, and the other functions of the Forwarding
Process must not interfere with the decision of the transmission Port. We
call this process trapping frames to CPU port.
Therefore, on the switch with CPU port architecture, link-local frames must
be trapped to CPU port, and certain link-local frames received by a Port of
a Bridge comprising a TPMR component or an S-VLAN component must be
excluded from it.
A Bridge of the switch with CPU port architecture cannot comprise a
Two-Port MAC Relay (TPMR) component as a TPMR component supports only a
subset of the functionality of a MAC Bridge. A Bridge comprising two Ports
(Management Port doesn't count) of this architecture will either function
as a standard MAC Bridge or a standard VLAN Bridge.
Therefore, a Bridge of this architecture can only comprise S-VLAN
components, C-VLAN components, or MAC Bridge components. Since there's no
TPMR component, we don't need to relay PDUs using the destination addresses
specified on the Nearest non-TPMR section, and the proportion of the
Nearest Customer Bridge section where they must be relayed by TPMR
components.
One option to trap link-local frames to CPU port is to add static FDB
entries with CPU port designated as destination port. However, because that
Independent VLAN Learning (IVL) is being used on every VID, each entry only
applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC
Bridge component or a C-VLAN component, there would have to be 16 times
4096 entries. This switch intellectual property can only hold a maximum of
2048 entries. Using this option, there also isn't a mechanism to prevent
link-local frames from being discarded when the spanning tree Port State of
the reception Port is discarding.
The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4
registers. Whilst this applies to every VID, it doesn't contain all of the
reserved MAC addresses without affecting the remaining Standard Group MAC
Addresses. The REV_UN frame tag utilised using the RGAC4 register covers
the remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination
addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF
destination addresses which may be relayed by MAC Bridges or VLAN Bridges.
The latter option provides better but not complete conformance.
This switch intellectual property also does not provide a mechanism to trap
link-local frames with specific destination addresses to CPU port by
Bridge, to conform to the filtering rules for the distinct Bridge
components.
Therefore, regardless of the type of the Bridge component, link-local
frames with these destination addresses will be trapped to CPU port:
01-80-C2-00-00-[00,01,02,03,0E]
In a Bridge comprising a MAC Bridge component or a C-VLAN component:
Link-local frames with these destination addresses won't be trapped to
CPU port which won't conform to IEEE Std 802.1Q-2022:
01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F]
In a Bridge comprising an S-VLAN component:
Link-local frames with these destination addresses will be trapped to CPU
port which won't conform to IEEE Std 802.1Q-2022:
01-80-C2-00-00-00
Link-local frames with these destination addresses won't be trapped to
CPU port which won't conform to IEEE Std 802.1Q-2022:
01-80-C2-00-00-[04,05,06,07,08,09,0A]
Currently on this switch intellectual property, if the spanning tree Port
State of the reception Port is discarding, link-local frames will be
discarded.
To trap link-local frames regardless of the spanning tree Port State, make
the switch regard them as Bridge Protocol Data Units (BPDUs). This switch
intellectual property only lets the frames regarded as BPDUs bypass the
spanning tree Port State function of the Forwarding Process.
With this change, the only remaining interference is the ingress rules.
When the reception Port has no PVID assigned on software, VLAN-untagged
frames won't be allowed in. There doesn't seem to be a mechanism on the
switch intellectual property to have link-local frames bypass this function
of the Forwarding Process.
Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
drivers/net/dsa/mt7530.c | 229 +++++++++++++++++++++++++++++++++------
drivers/net/dsa/mt7530.h | 5 +
2 files changed, 200 insertions(+), 34 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -943,20 +943,173 @@ static void mt7530_setup_port5(struct ds
mutex_unlock(&priv->reg_mutex);
}
-/* On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE Std
- * 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC DA
- * must only be propagated to C-VLAN and MAC Bridge components. That means
- * VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports,
- * these frames are supposed to be processed by the CPU (software). So we make
- * the switch only forward them to the CPU port. And if received from a CPU
- * port, forward to a single port. The software is responsible of making the
- * switch conform to the latter by setting a single port as destination port on
- * the special tag.
- *
- * This switch intellectual property cannot conform to this part of the standard
- * fully. Whilst the REV_UN frame tag covers the remaining :04-0D and :0F MAC
- * DAs, it also includes :22-FF which the scope of propagation is not supposed
- * to be restricted for these MAC DAs.
+/* In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer (DLL)
+ * of the Open Systems Interconnection basic reference model (OSI/RM) are
+ * described; the medium access control (MAC) and logical link control (LLC)
+ * sublayers. The MAC sublayer is the one facing the physical layer.
+ *
+ * In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A
+ * Bridge component comprises a MAC Relay Entity for interconnecting the Ports
+ * of the Bridge, at least two Ports, and higher layer entities with at least a
+ * Spanning Tree Protocol Entity included.
+ *
+ * Each Bridge Port also functions as an end station and shall provide the MAC
+ * Service to an LLC Entity. Each instance of the MAC Service is provided to a
+ * distinct LLC Entity that supports protocol identification, multiplexing, and
+ * demultiplexing, for protocol data unit (PDU) transmission and reception by
+ * one or more higher layer entities.
+ *
+ * It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC
+ * Entity associated with each Bridge Port is modeled as being directly
+ * connected to the attached Local Area Network (LAN).
+ *
+ * On the switch with CPU port architecture, CPU port functions as Management
+ * Port, and the Management Port functionality is provided by software which
+ * functions as an end station. Software is connected to an IEEE 802 LAN that is
+ * wholly contained within the system that incorporates the Bridge. Software
+ * provides access to the LLC Entity associated with each Bridge Port by the
+ * value of the source port field on the special tag on the frame received by
+ * software.
+ *
+ * We call frames that carry control information to determine the active
+ * topology and current extent of each Virtual Local Area Network (VLAN), i.e.,
+ * spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN Registration
+ * Protocol Data Units (MVRPDUs), and frames from other link constrained
+ * protocols, such as Extensible Authentication Protocol over LAN (EAPOL) and
+ * Link Layer Discovery Protocol (LLDP), link-local frames. They are not
+ * forwarded by a Bridge. Permanently configured entries in the filtering
+ * database (FDB) ensure that such frames are discarded by the Forwarding
+ * Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in detail:
+ *
+ * Each of the reserved MAC addresses specified in Table 8-1
+ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be
+ * permanently configured in the FDB in C-VLAN components and ERs.
+ *
+ * Each of the reserved MAC addresses specified in Table 8-2
+ * (01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently
+ * configured in the FDB in S-VLAN components.
+ *
+ * Each of the reserved MAC addresses specified in Table 8-3
+ * (01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB in
+ * TPMR components.
+ *
+ * The FDB entries for reserved MAC addresses shall specify filtering for all
+ * Bridge Ports and all VIDs. Management shall not provide the capability to
+ * modify or remove entries for reserved MAC addresses.
+ *
+ * The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of
+ * propagation of PDUs within a Bridged Network, as follows:
+ *
+ * The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that no
+ * conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN)
+ * component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward.
+ * PDUs transmitted using this destination address, or any other addresses
+ * that appear in Table 8-1, Table 8-2, and Table 8-3
+ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can
+ * therefore travel no further than those stations that can be reached via a
+ * single individual LAN from the originating station.
+ *
+ * The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an
+ * address that no conformant S-VLAN component, C-VLAN component, or MAC
+ * Bridge can forward; however, this address is relayed by a TPMR component.
+ * PDUs using this destination address, or any of the other addresses that
+ * appear in both Table 8-1 and Table 8-2 but not in Table 8-3
+ * (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed by
+ * any TPMRs but will propagate no further than the nearest S-VLAN component,
+ * C-VLAN component, or MAC Bridge.
+ *
+ * The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an address
+ * that no conformant C-VLAN component, MAC Bridge can forward; however, it is
+ * relayed by TPMR components and S-VLAN components. PDUs using this
+ * destination address, or any of the other addresses that appear in Table 8-1
+ * but not in either Table 8-2 or Table 8-3 (01-80-C2-00-00-[00,0B,0C,0D,0F]),
+ * will be relayed by TPMR components and S-VLAN components but will propagate
+ * no further than the nearest C-VLAN component or MAC Bridge.
+ *
+ * Because the LLC Entity associated with each Bridge Port is provided via CPU
+ * port, we must not filter these frames but forward them to CPU port.
+ *
+ * In a Bridge, the transmission Port is majorly decided by ingress and egress
+ * rules, FDB, and spanning tree Port State functions of the Forwarding Process.
+ * For link-local frames, only CPU port should be designated as destination port
+ * in the FDB, and the other functions of the Forwarding Process must not
+ * interfere with the decision of the transmission Port. We call this process
+ * trapping frames to CPU port.
+ *
+ * Therefore, on the switch with CPU port architecture, link-local frames must
+ * be trapped to CPU port, and certain link-local frames received by a Port of a
+ * Bridge comprising a TPMR component or an S-VLAN component must be excluded
+ * from it.
+ *
+ * A Bridge of the switch with CPU port architecture cannot comprise a Two-Port
+ * MAC Relay (TPMR) component as a TPMR component supports only a subset of the
+ * functionality of a MAC Bridge. A Bridge comprising two Ports (Management Port
+ * doesn't count) of this architecture will either function as a standard MAC
+ * Bridge or a standard VLAN Bridge.
+ *
+ * Therefore, a Bridge of this architecture can only comprise S-VLAN components,
+ * C-VLAN components, or MAC Bridge components. Since there's no TPMR component,
+ * we don't need to relay PDUs using the destination addresses specified on the
+ * Nearest non-TPMR section, and the proportion of the Nearest Customer Bridge
+ * section where they must be relayed by TPMR components.
+ *
+ * One option to trap link-local frames to CPU port is to add static FDB entries
+ * with CPU port designated as destination port. However, because that
+ * Independent VLAN Learning (IVL) is being used on every VID, each entry only
+ * applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC
+ * Bridge component or a C-VLAN component, there would have to be 16 times 4096
+ * entries. This switch intellectual property can only hold a maximum of 2048
+ * entries. Using this option, there also isn't a mechanism to prevent
+ * link-local frames from being discarded when the spanning tree Port State of
+ * the reception Port is discarding.
+ *
+ * The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4
+ * registers. Whilst this applies to every VID, it doesn't contain all of the
+ * reserved MAC addresses without affecting the remaining Standard Group MAC
+ * Addresses. The REV_UN frame tag utilised using the RGAC4 register covers the
+ * remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination
+ * addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF
+ * destination addresses which may be relayed by MAC Bridges or VLAN Bridges.
+ * The latter option provides better but not complete conformance.
+ *
+ * This switch intellectual property also does not provide a mechanism to trap
+ * link-local frames with specific destination addresses to CPU port by Bridge,
+ * to conform to the filtering rules for the distinct Bridge components.
+ *
+ * Therefore, regardless of the type of the Bridge component, link-local frames
+ * with these destination addresses will be trapped to CPU port:
+ *
+ * 01-80-C2-00-00-[00,01,02,03,0E]
+ *
+ * In a Bridge comprising a MAC Bridge component or a C-VLAN component:
+ *
+ * Link-local frames with these destination addresses won't be trapped to CPU
+ * port which won't conform to IEEE Std 802.1Q-2022:
+ *
+ * 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F]
+ *
+ * In a Bridge comprising an S-VLAN component:
+ *
+ * Link-local frames with these destination addresses will be trapped to CPU
+ * port which won't conform to IEEE Std 802.1Q-2022:
+ *
+ * 01-80-C2-00-00-00
+ *
+ * Link-local frames with these destination addresses won't be trapped to CPU
+ * port which won't conform to IEEE Std 802.1Q-2022:
+ *
+ * 01-80-C2-00-00-[04,05,06,07,08,09,0A]
+ *
+ * To trap link-local frames to CPU port as conformant as this switch
+ * intellectual property can allow, link-local frames are made to be regarded as
+ * Bridge Protocol Data Units (BPDUs). This is because this switch intellectual
+ * property only lets the frames regarded as BPDUs bypass the spanning tree Port
+ * State function of the Forwarding Process.
+ *
+ * The only remaining interference is the ingress rules. When the reception Port
+ * has no PVID assigned on software, VLAN-untagged frames won't be allowed in.
+ * There doesn't seem to be a mechanism on the switch intellectual property to
+ * have link-local frames bypass this function of the Forwarding Process.
*/
static void
mt753x_trap_frames(struct mt7530_priv *priv)
@@ -964,35 +1117,43 @@ mt753x_trap_frames(struct mt7530_priv *p
/* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them
* VLAN-untagged.
*/
- mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK |
- MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK |
- MT753X_BPDU_PORT_FW_MASK,
- MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) |
- MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
+ mt7530_rmw(priv, MT753X_BPC,
+ MT753X_PAE_BPDU_FR | MT753X_PAE_EG_TAG_MASK |
+ MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK |
+ MT753X_BPDU_PORT_FW_MASK,
+ MT753X_PAE_BPDU_FR |
+ MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) |
+ MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_BPDU_CPU_ONLY);
/* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress
* them VLAN-untagged.
*/
- mt7530_rmw(priv, MT753X_RGAC1, MT753X_R02_EG_TAG_MASK |
- MT753X_R02_PORT_FW_MASK | MT753X_R01_EG_TAG_MASK |
- MT753X_R01_PORT_FW_MASK,
- MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) |
- MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
+ mt7530_rmw(priv, MT753X_RGAC1,
+ MT753X_R02_BPDU_FR | MT753X_R02_EG_TAG_MASK |
+ MT753X_R02_PORT_FW_MASK | MT753X_R01_BPDU_FR |
+ MT753X_R01_EG_TAG_MASK | MT753X_R01_PORT_FW_MASK,
+ MT753X_R02_BPDU_FR |
+ MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) |
+ MT753X_R01_BPDU_FR |
+ MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_BPDU_CPU_ONLY);
/* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress
* them VLAN-untagged.
*/
- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK |
- MT753X_R0E_PORT_FW_MASK | MT753X_R03_EG_TAG_MASK |
- MT753X_R03_PORT_FW_MASK,
- MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) |
- MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
+ mt7530_rmw(priv, MT753X_RGAC2,
+ MT753X_R0E_BPDU_FR | MT753X_R0E_EG_TAG_MASK |
+ MT753X_R0E_PORT_FW_MASK | MT753X_R03_BPDU_FR |
+ MT753X_R03_EG_TAG_MASK | MT753X_R03_PORT_FW_MASK,
+ MT753X_R0E_BPDU_FR |
+ MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) |
+ MT753X_R03_BPDU_FR |
+ MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_BPDU_CPU_ONLY);
}
static void
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -65,6 +65,7 @@ enum mt753x_id {
/* Registers for BPDU and PAE frame control*/
#define MT753X_BPC 0x24
+#define MT753X_PAE_BPDU_FR BIT(25)
#define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22)
#define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x)
#define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16)
@@ -75,20 +76,24 @@ enum mt753x_id {
/* Register for :01 and :02 MAC DA frame control */
#define MT753X_RGAC1 0x28
+#define MT753X_R02_BPDU_FR BIT(25)
#define MT753X_R02_EG_TAG_MASK GENMASK(24, 22)
#define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x)
#define MT753X_R02_PORT_FW_MASK GENMASK(18, 16)
#define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x)
+#define MT753X_R01_BPDU_FR BIT(9)
#define MT753X_R01_EG_TAG_MASK GENMASK(8, 6)
#define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x)
#define MT753X_R01_PORT_FW_MASK GENMASK(2, 0)
/* Register for :03 and :0E MAC DA frame control */
#define MT753X_RGAC2 0x2c
+#define MT753X_R0E_BPDU_FR BIT(25)
#define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22)
#define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x)
#define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16)
#define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x)
+#define MT753X_R03_BPDU_FR BIT(9)
#define MT753X_R03_EG_TAG_MASK GENMASK(8, 6)
#define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x)
#define MT753X_R03_PORT_FW_MASK GENMASK(2, 0)

View File

@ -19,7 +19,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2841,28 +2841,34 @@ mt7531_mac_config(struct dsa_switch *ds,
@@ -2861,28 +2861,34 @@ mt7531_mac_config(struct dsa_switch *ds,
}
static struct phylink_pcs *
@ -60,7 +60,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
if ((port == 5 || port == 6) && priv->info->mac_port_config)
priv->info->mac_port_config(ds, port, mode, state->interface);
@@ -2872,23 +2878,25 @@ mt753x_phylink_mac_config(struct dsa_swi
@@ -2892,23 +2898,25 @@ mt753x_phylink_mac_config(struct dsa_swi
mt7530_set(priv, MT7530_PMCR_P(port), PMCR_EXT_PHY);
}
@ -92,7 +92,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
u32 mcr;
mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
@@ -2923,7 +2931,7 @@ static void mt753x_phylink_mac_link_up(s
@@ -2943,7 +2951,7 @@ static void mt753x_phylink_mac_link_up(s
}
}
@ -101,7 +101,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
}
static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
@@ -3148,16 +3156,19 @@ const struct dsa_switch_ops mt7530_switc
@@ -3169,16 +3177,19 @@ const struct dsa_switch_ops mt7530_switc
.port_mirror_add = mt753x_port_mirror_add,
.port_mirror_del = mt753x_port_mirror_del,
.phylink_get_caps = mt753x_phylink_get_caps,
@ -125,7 +125,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
const struct mt753x_info mt753x_table[] = {
[ID_MT7621] = {
.id = ID_MT7621,
@@ -3227,6 +3238,7 @@ mt7530_probe_common(struct mt7530_priv *
@@ -3248,6 +3259,7 @@ mt7530_probe_common(struct mt7530_priv *
priv->dev = dev;
priv->ds->priv = priv;
priv->ds->ops = &mt7530_switch_ops;

View File

@ -1,70 +0,0 @@
From d4097ddef078a113643a6dcde01e99741f852adb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Sat, 13 Apr 2024 16:01:39 +0300
Subject: [PATCH 2/5] net: dsa: mt7530: fix mirroring frames received on local
port
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This switch intellectual property provides a bit on the ARL global control
register which controls allowing mirroring frames which are received on the
local port (monitor port). This bit is unset after reset.
This ability must be enabled to fully support the port mirroring feature on
this switch intellectual property.
Therefore, this patch fixes the traffic not being reflected on a port,
which would be configured like below:
tc qdisc add dev swp0 clsact
tc filter add dev swp0 ingress matchall skip_sw \
action mirred egress mirror dev swp0
As a side note, this configuration provides the hairpinning feature for a
single port.
Fixes: 37feab6076aa ("net: dsa: mt7530: add support for port mirroring")
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/mt7530.c | 6 ++++++
drivers/net/dsa/mt7530.h | 4 ++++
2 files changed, 10 insertions(+)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2471,6 +2471,9 @@ mt7530_setup(struct dsa_switch *ds)
PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
}
+ /* Allow mirroring frames received on the local port (monitor port). */
+ mt7530_set(priv, MT753X_AGC, LOCAL_EN);
+
/* Setup VLAN ID 0 for VLAN-unaware bridges */
ret = mt7530_setup_vlan0(priv);
if (ret)
@@ -2582,6 +2585,9 @@ mt7531_setup_common(struct dsa_switch *d
PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
}
+ /* Allow mirroring frames received on the local port (monitor port). */
+ mt7530_set(priv, MT753X_AGC, LOCAL_EN);
+
/* Flush the FDB table */
ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);
if (ret < 0)
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -32,6 +32,10 @@ enum mt753x_id {
#define SYSC_REG_RSTCTRL 0x34
#define RESET_MCM BIT(2)
+/* Register for ARL global control */
+#define MT753X_AGC 0xc
+#define LOCAL_EN BIT(7)
+
/* Registers to mac forward control for unknown frames */
#define MT7530_MFC 0x10
#define BC_FFP(x) (((x) & 0xff) << 24)

View File

@ -26,7 +26,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1876,14 +1876,16 @@ mt7530_port_vlan_del(struct dsa_switch *
@@ -1890,14 +1890,16 @@ mt7530_port_vlan_del(struct dsa_switch *
static int mt753x_mirror_port_get(unsigned int id, u32 val)
{

View File

@ -184,7 +184,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
err:
if (ret < 0)
dev_err(&bus->dev,
@@ -2670,16 +2678,19 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2684,16 +2692,19 @@ mt7531_setup(struct dsa_switch *ds)
* phy_[read,write]_mmd_indirect is called, we provide our own
* mt7531_ind_mmd_phy_[read,write] to complete this function.
*/

View File

@ -33,7 +33,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -889,7 +889,7 @@ static void mt7530_setup_port5(struct ds
@@ -903,7 +903,7 @@ static void mt7530_setup_port5(struct ds
val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS;
/* Setup the MAC by default for the cpu port */
@ -42,7 +42,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
break;
case P5_INTF_SEL_GMAC5:
/* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */
@@ -2435,8 +2435,8 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2449,8 +2449,8 @@ mt7530_setup(struct dsa_switch *ds)
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@ -53,7 +53,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Disable forwarding by default on all ports */
mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
@@ -2546,8 +2546,8 @@ mt7531_setup_common(struct dsa_switch *d
@@ -2560,8 +2560,8 @@ mt7531_setup_common(struct dsa_switch *d
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@ -64,7 +64,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Disable forwarding by default on all ports */
mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
@@ -2630,7 +2630,7 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2644,7 +2644,7 @@ mt7531_setup(struct dsa_switch *ds)
/* Force link down on all ports before internal reset */
for (i = 0; i < MT7530_NUM_PORTS; i++)
@ -73,7 +73,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Reset the switch through internal reset */
mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST);
@@ -2872,7 +2872,7 @@ mt753x_phylink_mac_config(struct phylink
@@ -2886,7 +2886,7 @@ mt753x_phylink_mac_config(struct phylink
/* Are we connected to external phy */
if (port == 5 && dsa_is_user_port(ds, 5))
@ -82,7 +82,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
static void mt753x_phylink_mac_link_down(struct phylink_config *config,
@@ -2882,7 +2882,7 @@ static void mt753x_phylink_mac_link_down
@@ -2896,7 +2896,7 @@ static void mt753x_phylink_mac_link_down
struct dsa_port *dp = dsa_phylink_to_port(config);
struct mt7530_priv *priv = dp->ds->priv;
@ -91,7 +91,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
static void mt753x_phylink_mac_link_up(struct phylink_config *config,
@@ -2896,7 +2896,7 @@ static void mt753x_phylink_mac_link_up(s
@@ -2910,7 +2910,7 @@ static void mt753x_phylink_mac_link_up(s
struct mt7530_priv *priv = dp->ds->priv;
u32 mcr;
@ -100,7 +100,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (speed) {
case SPEED_1000:
@@ -2911,9 +2911,9 @@ static void mt753x_phylink_mac_link_up(s
@@ -2925,9 +2925,9 @@ static void mt753x_phylink_mac_link_up(s
if (duplex == DUPLEX_FULL) {
mcr |= PMCR_FORCE_FDX;
if (tx_pause)
@ -112,7 +112,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) {
@@ -2928,7 +2928,7 @@ static void mt753x_phylink_mac_link_up(s
@@ -2942,7 +2942,7 @@ static void mt753x_phylink_mac_link_up(s
}
}

View File

@ -25,7 +25,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -850,19 +850,15 @@ mt7530_set_ageing_time(struct dsa_switch
@@ -864,19 +864,15 @@ mt7530_set_ageing_time(struct dsa_switch
return 0;
}
@ -52,7 +52,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
}
@@ -879,23 +875,23 @@ static void mt7530_setup_port5(struct ds
@@ -893,23 +889,23 @@ static void mt7530_setup_port5(struct ds
val |= MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS;
val &= ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL;
@ -85,7 +85,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
break;
}
@@ -923,8 +919,8 @@ static void mt7530_setup_port5(struct ds
@@ -937,8 +933,8 @@ static void mt7530_setup_port5(struct ds
mt7530_write(priv, MT7530_MHWTRAP, val);
@ -96,7 +96,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
mutex_unlock(&priv->reg_mutex);
}
@@ -2467,13 +2463,11 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2481,13 +2477,11 @@ mt7530_setup(struct dsa_switch *ds)
if (ret)
return ret;
@ -114,7 +114,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
*/
for_each_child_of_node(dn, mac_np) {
if (!of_device_is_compatible(mac_np,
@@ -2497,17 +2491,16 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2511,17 +2505,16 @@ mt7530_setup(struct dsa_switch *ds)
}
id = of_mdio_parse_addr(ds->dev, phy_node);
if (id == 0)
@ -135,7 +135,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
mt7530_setup_port5(ds, interface);
}
@@ -2645,9 +2638,6 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2659,9 +2652,6 @@ mt7531_setup(struct dsa_switch *ds)
MT7531_EXT_P_MDIO_12);
}

View File

@ -21,7 +21,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1100,42 +1100,34 @@ mt753x_trap_frames(struct mt7530_priv *p
@@ -1114,42 +1114,34 @@ mt753x_trap_frames(struct mt7530_priv *p
* VLAN-untagged.
*/
mt7530_rmw(priv, MT753X_BPC,

View File

@ -25,7 +25,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1140,7 +1140,7 @@ mt753x_cpu_port_enable(struct dsa_switch
@@ -1154,7 +1154,7 @@ mt753x_cpu_port_enable(struct dsa_switch
PORT_SPEC_TAG);
/* Enable flooding on the CPU port */
@ -33,8 +33,8 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
+ mt7530_set(priv, MT753X_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |
UNU_FFP(BIT(port)));
/* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
@@ -1304,15 +1304,15 @@ mt7530_port_bridge_flags(struct dsa_swit
/* Add the CPU port to the CPU port bitmap for MT7531. Trapped frames
@@ -1318,15 +1318,15 @@ mt7530_port_bridge_flags(struct dsa_swit
flags.val & BR_LEARNING ? 0 : SA_DIS);
if (flags.mask & BR_FLOOD)
@ -53,7 +53,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
flags.val & BR_BCAST_FLOOD ? BC_FFP(BIT(port)) : 0);
return 0;
@@ -1848,20 +1848,6 @@ mt7530_port_vlan_del(struct dsa_switch *
@@ -1862,20 +1862,6 @@ mt7530_port_vlan_del(struct dsa_switch *
return 0;
}
@ -74,7 +74,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
static int mt753x_port_mirror_add(struct dsa_switch *ds, int port,
struct dsa_mall_mirror_tc_entry *mirror,
bool ingress, struct netlink_ext_ack *extack)
@@ -1877,14 +1863,14 @@ static int mt753x_port_mirror_add(struct
@@ -1891,14 +1877,14 @@ static int mt753x_port_mirror_add(struct
val = mt7530_read(priv, MT753X_MIRROR_REG(priv->id));
/* MT7530 only supports one monitor port */
@ -92,7 +92,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
mt7530_write(priv, MT753X_MIRROR_REG(priv->id), val);
val = mt7530_read(priv, MT7530_PCR_P(port));
@@ -2524,7 +2510,7 @@ mt7531_setup_common(struct dsa_switch *d
@@ -2538,7 +2524,7 @@ mt7531_setup_common(struct dsa_switch *d
mt7530_mib_reset(ds);
/* Disable flooding on all ports */
@ -101,7 +101,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
UNU_FFP_MASK);
for (i = 0; i < MT7530_NUM_PORTS; i++) {
@@ -3086,10 +3072,12 @@ mt753x_conduit_state_change(struct dsa_s
@@ -3100,10 +3086,12 @@ mt753x_conduit_state_change(struct dsa_s
else
priv->active_cpu_ports &= ~mask;

View File

@ -30,7 +30,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -403,23 +403,23 @@ mt7530_setup_port6(struct dsa_switch *ds
@@ -417,23 +417,23 @@ mt7530_setup_port6(struct dsa_switch *ds
mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1));
@ -60,7 +60,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
ncpo1 = 0x1400;
}
@@ -442,19 +442,20 @@ mt7530_setup_port6(struct dsa_switch *ds
@@ -456,19 +456,20 @@ mt7530_setup_port6(struct dsa_switch *ds
static void
mt7531_pll_setup(struct mt7530_priv *priv)
{
@ -86,7 +86,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Step 1 : Disable MT7531 COREPLL */
val = mt7530_read(priv, MT7531_PLLGP_EN);
@@ -483,13 +484,13 @@ mt7531_pll_setup(struct mt7530_priv *pri
@@ -497,13 +498,13 @@ mt7531_pll_setup(struct mt7530_priv *pri
usleep_range(25, 35);
switch (xtal) {
@ -102,7 +102,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
val = mt7530_read(priv, MT7531_PLLGP_CR0);
val &= ~RG_COREPLL_SDM_PCW_M;
val |= 0x190000 << RG_COREPLL_SDM_PCW_S;
@@ -870,20 +871,20 @@ static void mt7530_setup_port5(struct ds
@@ -884,20 +885,20 @@ static void mt7530_setup_port5(struct ds
mutex_lock(&priv->reg_mutex);
@ -128,7 +128,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Setup the MAC by default for the cpu port */
mt7530_write(priv, MT753X_PMCR_P(5), 0x56300);
@@ -891,13 +892,13 @@ static void mt7530_setup_port5(struct ds
@@ -905,13 +906,13 @@ static void mt7530_setup_port5(struct ds
/* GMAC5: P5 -> SoC MAC or external PHY */
default:
@ -144,7 +144,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* P5 RGMII RX Clock Control: delay setting for 1000M */
mt7530_write(priv, MT7530_P5RGMIIRXCR, CSR_RGMII_EDGE_ALIGN);
@@ -917,7 +918,7 @@ static void mt7530_setup_port5(struct ds
@@ -931,7 +932,7 @@ static void mt7530_setup_port5(struct ds
P5_IO_CLK_DRV(1) | P5_IO_DATA_DRV(1));
}
@ -153,7 +153,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, mode=%s, phy-mode=%s\n", val,
mt7530_p5_mode_str(priv->p5_mode), phy_modes(interface));
@@ -2356,7 +2357,7 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2370,7 +2371,7 @@ mt7530_setup(struct dsa_switch *ds)
}
/* Waiting for MT7530 got to stable */
@ -162,7 +162,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
ret = readx_poll_timeout(_mt7530_read, &p, val, val != 0,
20, 1000000);
if (ret < 0) {
@@ -2371,7 +2372,7 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2385,7 +2386,7 @@ mt7530_setup(struct dsa_switch *ds)
return -ENODEV;
}
@ -171,7 +171,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
dev_err(priv->dev,
"MT7530 with a 20MHz XTAL is not supported!\n");
return -EINVAL;
@@ -2392,12 +2393,12 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2406,12 +2407,12 @@ mt7530_setup(struct dsa_switch *ds)
RD_TAP_MASK, RD_TAP(16));
/* Enable port 6 */
@ -189,7 +189,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
mt7530_pll_setup(priv);
mt753x_trap_frames(priv);
@@ -2577,7 +2578,7 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2591,7 +2592,7 @@ mt7531_setup(struct dsa_switch *ds)
}
/* Waiting for MT7530 got to stable */

View File

@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -873,8 +873,7 @@ static void mt7530_setup_port5(struct ds
@@ -887,8 +887,7 @@ static void mt7530_setup_port5(struct ds
val = mt7530_read(priv, MT753X_MTRAP);
@ -38,7 +38,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (priv->p5_mode) {
/* MUX_PHY_P0: P0 -> P5 -> SoC MAC */
@@ -884,15 +883,13 @@ static void mt7530_setup_port5(struct ds
@@ -898,15 +897,13 @@ static void mt7530_setup_port5(struct ds
/* MUX_PHY_P4: P4 -> P5 -> SoC MAC */
case MUX_PHY_P4:
@ -55,7 +55,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
break;
}
@@ -1186,6 +1183,14 @@ mt7530_port_enable(struct dsa_switch *ds
@@ -1200,6 +1197,14 @@ mt7530_port_enable(struct dsa_switch *ds
mutex_unlock(&priv->reg_mutex);
@ -70,7 +70,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
return 0;
}
@@ -1204,6 +1209,14 @@ mt7530_port_disable(struct dsa_switch *d
@@ -1218,6 +1223,14 @@ mt7530_port_disable(struct dsa_switch *d
PCR_MATRIX_CLR);
mutex_unlock(&priv->reg_mutex);
@ -85,7 +85,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
static int
@@ -2392,11 +2405,11 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2406,11 +2419,11 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7530_TRGMII_RD(i),
RD_TAP_MASK, RD_TAP(16));
@ -102,7 +102,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ)
mt7530_pll_setup(priv);
@@ -2479,8 +2492,11 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2493,8 +2506,11 @@ mt7530_setup(struct dsa_switch *ds)
break;
}

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2658,7 +2658,9 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2672,7 +2672,9 @@ mt7531_setup(struct dsa_switch *ds)
0);
}
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Setup VLAN ID 0 for VLAN-unaware bridges */
ret = mt7530_setup_vlan0(priv);
@@ -3017,6 +3019,8 @@ mt753x_setup(struct dsa_switch *ds)
@@ -3031,6 +3033,8 @@ mt753x_setup(struct dsa_switch *ds)
ret = mt7530_setup_mdio(priv);
if (ret && priv->irq)
mt7530_free_irq_common(priv);

View File

@ -24,7 +24,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2676,6 +2676,8 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2690,6 +2690,8 @@ mt7531_setup(struct dsa_switch *ds)
static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
@ -33,7 +33,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */
case 0 ... 4:
@@ -2707,6 +2709,8 @@ static void mt7531_mac_port_get_caps(str
@@ -2721,6 +2723,8 @@ static void mt7531_mac_port_get_caps(str
{
struct mt7530_priv *priv = ds->priv;
@ -42,7 +42,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */
case 0 ... 4:
@@ -2746,14 +2750,17 @@ static void mt7988_mac_port_get_caps(str
@@ -2760,14 +2764,17 @@ static void mt7988_mac_port_get_caps(str
case 0 ... 3:
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces);
@ -62,7 +62,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
}
}
@@ -2923,9 +2930,7 @@ static void mt753x_phylink_get_caps(stru
@@ -2937,9 +2944,7 @@ static void mt753x_phylink_get_caps(stru
{
struct mt7530_priv *priv = ds->priv;

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3220,13 +3220,6 @@ mt7530_probe_common(struct mt7530_priv *
@@ -3235,13 +3235,6 @@ mt7530_probe_common(struct mt7530_priv *
if (!priv->info)
return -EINVAL;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -3048,10 +3048,10 @@ static int mt753x_get_mac_eee(struct dsa
@@ -3062,10 +3062,10 @@ static int mt753x_get_mac_eee(struct dsa
struct ethtool_eee *e)
{
struct mt7530_priv *priv = ds->priv;
@ -32,7 +32,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
return 0;
}
@@ -3065,11 +3065,11 @@ static int mt753x_set_mac_eee(struct dsa
@@ -3079,11 +3079,11 @@ static int mt753x_set_mac_eee(struct dsa
if (e->tx_lpi_timer > 0xFFF)
return -EINVAL;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1404,7 +1404,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
@@ -1418,7 +1418,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,
G0_PORT_VID_DEF);
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
if (dsa_is_user_port(ds, i) &&
dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {
all_user_ports_removed = false;
@@ -2419,7 +2419,7 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2433,7 +2433,7 @@ mt7530_setup(struct dsa_switch *ds)
/* Enable and reset MIB counters */
mt7530_mib_reset(ds);
@ -37,7 +37,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@@ -2530,7 +2530,7 @@ mt7531_setup_common(struct dsa_switch *d
@@ -2544,7 +2544,7 @@ mt7531_setup_common(struct dsa_switch *d
mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK |
UNU_FFP_MASK);
@ -46,7 +46,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Clear link settings and enable force mode to force link down
* on all ports until they're enabled later.
*/
@@ -2617,7 +2617,7 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2631,7 +2631,7 @@ mt7531_setup(struct dsa_switch *ds)
priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
/* Force link down on all ports before internal reset */

View File

@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2776,7 +2776,7 @@ mt7530_mac_config(struct dsa_switch *ds,
@@ -2790,7 +2790,7 @@ mt7530_mac_config(struct dsa_switch *ds,
mt7530_setup_port6(priv->ds, interface);
}
@ -26,7 +26,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
phy_interface_t interface,
struct phy_device *phydev)
{
@@ -2827,7 +2827,7 @@ mt7531_mac_config(struct dsa_switch *ds,
@@ -2841,7 +2841,7 @@ mt7531_mac_config(struct dsa_switch *ds,
if (phy_interface_mode_is_rgmii(interface)) {
dp = dsa_to_port(ds, port);
phydev = dp->slave->phydev;

View File

@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2626,7 +2626,10 @@ mt7531_setup(struct dsa_switch *ds)
@@ -2640,7 +2640,10 @@ mt7531_setup(struct dsa_switch *ds)
if (!priv->p5_sgmii) {
mt7531_pll_setup(priv);
} else {

View File

@ -43,7 +43,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
#define QUECTEL_VENDOR_ID 0x2c7c
/* These Quectel products use Quectel's vendor ID */
@@ -1152,6 +1157,11 @@ static const struct usb_device_id option
@@ -1156,6 +1161,11 @@ static const struct usb_device_id option
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */
.driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) },
@ -55,7 +55,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
/* Quectel products using Qualcomm vendor ID */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)},
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20),
@@ -1193,6 +1203,11 @@ static const struct usb_device_id option
@@ -1197,6 +1207,11 @@ static const struct usb_device_id option
.driver_info = ZLP },
{ USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
.driver_info = RSVD(4) },

View File

@ -15,7 +15,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/bridge/br_input.c
+++ b/net/bridge/br_input.c
@@ -222,6 +222,9 @@ static void __br_handle_local_finish(str
@@ -227,6 +227,9 @@ static void __br_handle_local_finish(str
/* note: already called with rcu_read_lock */
static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb)
{
@ -25,7 +25,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
__br_handle_local_finish(skb);
/* return 1 to signal the okfn() was called so it's ok to use the skb */
@@ -390,6 +393,17 @@ forward:
@@ -397,6 +400,17 @@ forward:
goto defer_stp_filtering;
switch (p->state) {

View File

@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
for (i = sizeof(struct ipt_entry);
i < e->target_offset;
i += m->u.match_size) {
@@ -1225,12 +1262,15 @@ compat_copy_entry_to_user(struct ipt_ent
@@ -1227,12 +1264,15 @@ compat_copy_entry_to_user(struct ipt_ent
compat_uint_t origsize;
const struct xt_entry_match *ematch;
int ret = 0;

View File

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -7951,7 +7951,7 @@ static int nft_register_flowtable_net_ho
@@ -7959,7 +7959,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

View File

@ -45,7 +45,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!(p->flags & BR_BCAST_FLOOD) && skb->dev != br->dev)
--- a/net/bridge/br_input.c
+++ b/net/bridge/br_input.c
@@ -344,6 +344,8 @@ static rx_handler_result_t br_handle_fra
@@ -349,6 +349,8 @@ static rx_handler_result_t br_handle_fra
fwd_mask |= p->group_fwd_mask;
switch (dest[5]) {
case 0x00: /* Bridge Group Address */

View File

@ -68,7 +68,7 @@ Best regards,
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1213,7 +1213,7 @@ mt7530_port_disable(struct dsa_switch *d
@@ -1227,7 +1227,7 @@ mt7530_port_disable(struct dsa_switch *d
if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
return;

View File

@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static struct amd_chipset_info {
struct pci_dev *nb_dev;
struct pci_dev *smbus_dev;
@@ -633,6 +635,10 @@ bool usb_amd_pt_check_port(struct device
@@ -631,6 +633,10 @@ bool usb_amd_pt_check_port(struct device
}
EXPORT_SYMBOL_GPL(usb_amd_pt_check_port);
@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* Make sure the controller is completely inactive, unable to
* generate interrupts or do DMA.
@@ -712,8 +718,17 @@ reset_needed:
@@ -710,8 +716,17 @@ reset_needed:
uhci_reset_hc(pdev, base);
return 1;
}
@ -48,7 +48,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask)
{
u16 cmd;
@@ -1285,3 +1300,4 @@ static void quirk_usb_early_handoff(stru
@@ -1283,3 +1298,4 @@ static void quirk_usb_early_handoff(stru
}
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff);
@ -98,7 +98,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#endif /* __LINUX_USB_PCI_QUIRKS_H */
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -483,7 +483,14 @@ extern int usb_hcd_pci_probe(struct pci_
@@ -484,7 +484,14 @@ extern int usb_hcd_pci_probe(struct pci_
extern void usb_hcd_pci_remove(struct pci_dev *dev);
extern void usb_hcd_pci_shutdown(struct pci_dev *dev);

View File

@ -61,7 +61,7 @@ Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
/*
* We need to store the untouched command line for future reference.
* We also need to store the touched command line since the parameter
@@ -959,6 +982,7 @@ asmlinkage __visible void __init __no_sa
@@ -961,6 +984,7 @@ asmlinkage __visible void __init __no_sa
pr_notice("%s", linux_banner);
early_security_init();
setup_arch(&command_line);

View File

@ -1,536 +0,0 @@
From fe5c8d03f3de89ae058e365b783f8c1314f47490 Mon Sep 17 00:00:00 2001
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: Fri, 20 Jan 2023 10:20:33 +0100
Subject: [PATCH 01/15] clk: mediatek: clk-gate: Propagate struct device with
mtk_clk_register_gates()
Commit e4c23e19aa2a ("clk: mediatek: Register clock gate with device")
introduces a helper function for the sole purpose of propagating a
struct device pointer to the clk API when registering the mtk-gate
clocks to take advantage of Runtime PM when/where needed and where
a power domain is defined in devicetree.
Function mtk_clk_register_gates() then becomes a wrapper around the
new mtk_clk_register_gates_with_dev() function that will simply pass
NULL as struct device: this is essential when registering drivers
with CLK_OF_DECLARE instead of as a platform device, as there will
be no struct device to pass... but we can as well simply have only
one function that always takes such pointer as a param and pass NULL
when unavoidable.
This commit removes the mtk_clk_register_gates() wrapper and renames
mtk_clk_register_gates_with_dev() to the former and all of the calls
to either of the two functions were fixed in all drivers in order to
reflect this change; also, to improve consistency with other kernel
functions, the pointer to struct device was moved as the first param.
Since a lot of MediaTek clock drivers are actually registering as a
platform device, but were still registering the mtk-gate clocks
without passing any struct device to the clock framework, they've
been changed to pass a valid one now, as to make all those platforms
able to use runtime power management where available.
While at it, some much needed indentation changes were also done.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-4-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
[daniel@makrotopia.org: dropped parts not relevant for OpenWrt]
---
drivers/clk/mediatek/clk-gate.c | 23 +++++++---------------
drivers/clk/mediatek/clk-gate.h | 7 +------
drivers/clk/mediatek/clk-mt2701-aud.c | 4 ++--
drivers/clk/mediatek/clk-mt2701-eth.c | 4 ++--
drivers/clk/mediatek/clk-mt2701-g3d.c | 2 +-
drivers/clk/mediatek/clk-mt2701-hif.c | 4 ++--
drivers/clk/mediatek/clk-mt2701-mm.c | 4 ++--
drivers/clk/mediatek/clk-mt2701.c | 12 +++++------
drivers/clk/mediatek/clk-mt2712-mm.c | 4 ++--
drivers/clk/mediatek/clk-mt2712.c | 12 +++++------
drivers/clk/mediatek/clk-mt7622-aud.c | 4 ++--
drivers/clk/mediatek/clk-mt7622-eth.c | 8 ++++----
drivers/clk/mediatek/clk-mt7622-hif.c | 8 ++++----
drivers/clk/mediatek/clk-mt7622.c | 14 ++++++-------
drivers/clk/mediatek/clk-mt7629-eth.c | 7 ++++---
drivers/clk/mediatek/clk-mt7629-hif.c | 8 ++++----
drivers/clk/mediatek/clk-mt7629.c | 10 +++++-----
drivers/clk/mediatek/clk-mt7986-eth.c | 10 +++++-----
drivers/clk/mediatek/clk-mt7986-infracfg.c | 4 ++--
19 files changed, 68 insertions(+), 81 deletions(-)
--- a/drivers/clk/mediatek/clk-gate.c
+++ b/drivers/clk/mediatek/clk-gate.c
@@ -152,12 +152,12 @@ const struct clk_ops mtk_clk_gate_ops_no
};
EXPORT_SYMBOL_GPL(mtk_clk_gate_ops_no_setclr_inv);
-static struct clk_hw *mtk_clk_register_gate(const char *name,
+static struct clk_hw *mtk_clk_register_gate(struct device *dev, const char *name,
const char *parent_name,
struct regmap *regmap, int set_ofs,
int clr_ofs, int sta_ofs, u8 bit,
const struct clk_ops *ops,
- unsigned long flags, struct device *dev)
+ unsigned long flags)
{
struct mtk_clk_gate *cg;
int ret;
@@ -202,10 +202,9 @@ static void mtk_clk_unregister_gate(stru
kfree(cg);
}
-int mtk_clk_register_gates_with_dev(struct device_node *node,
- const struct mtk_gate *clks, int num,
- struct clk_hw_onecell_data *clk_data,
- struct device *dev)
+int mtk_clk_register_gates(struct device *dev, struct device_node *node,
+ const struct mtk_gate *clks, int num,
+ struct clk_hw_onecell_data *clk_data)
{
int i;
struct clk_hw *hw;
@@ -229,13 +228,13 @@ int mtk_clk_register_gates_with_dev(stru
continue;
}
- hw = mtk_clk_register_gate(gate->name, gate->parent_name,
+ hw = mtk_clk_register_gate(dev, gate->name, gate->parent_name,
regmap,
gate->regs->set_ofs,
gate->regs->clr_ofs,
gate->regs->sta_ofs,
gate->shift, gate->ops,
- gate->flags, dev);
+ gate->flags);
if (IS_ERR(hw)) {
pr_err("Failed to register clk %s: %pe\n", gate->name,
@@ -261,14 +260,6 @@ err:
return PTR_ERR(hw);
}
-EXPORT_SYMBOL_GPL(mtk_clk_register_gates_with_dev);
-
-int mtk_clk_register_gates(struct device_node *node,
- const struct mtk_gate *clks, int num,
- struct clk_hw_onecell_data *clk_data)
-{
- return mtk_clk_register_gates_with_dev(node, clks, num, clk_data, NULL);
-}
EXPORT_SYMBOL_GPL(mtk_clk_register_gates);
void mtk_clk_unregister_gates(const struct mtk_gate *clks, int num,
--- a/drivers/clk/mediatek/clk-gate.h
+++ b/drivers/clk/mediatek/clk-gate.h
@@ -50,15 +50,10 @@ struct mtk_gate {
#define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops) \
GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0)
-int mtk_clk_register_gates(struct device_node *node,
+int mtk_clk_register_gates(struct device *dev, struct device_node *node,
const struct mtk_gate *clks, int num,
struct clk_hw_onecell_data *clk_data);
-int mtk_clk_register_gates_with_dev(struct device_node *node,
- const struct mtk_gate *clks, int num,
- struct clk_hw_onecell_data *clk_data,
- struct device *dev);
-
void mtk_clk_unregister_gates(const struct mtk_gate *clks, int num,
struct clk_hw_onecell_data *clk_data);
--- a/drivers/clk/mediatek/clk-mt2701-aud.c
+++ b/drivers/clk/mediatek/clk-mt2701-aud.c
@@ -127,8 +127,8 @@ static int clk_mt2701_aud_probe(struct p
clk_data = mtk_alloc_clk_data(CLK_AUD_NR);
- mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, audio_clks,
+ ARRAY_SIZE(audio_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) {
--- a/drivers/clk/mediatek/clk-mt2701-eth.c
+++ b/drivers/clk/mediatek/clk-mt2701-eth.c
@@ -51,8 +51,8 @@ static int clk_mt2701_eth_probe(struct p
clk_data = mtk_alloc_clk_data(CLK_ETHSYS_NR);
- mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, eth_clks,
+ ARRAY_SIZE(eth_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
--- a/drivers/clk/mediatek/clk-mt2701-g3d.c
+++ b/drivers/clk/mediatek/clk-mt2701-g3d.c
@@ -45,7 +45,7 @@ static int clk_mt2701_g3dsys_init(struct
clk_data = mtk_alloc_clk_data(CLK_G3DSYS_NR);
- mtk_clk_register_gates(node, g3d_clks, ARRAY_SIZE(g3d_clks),
+ mtk_clk_register_gates(&pdev->dev, node, g3d_clks, ARRAY_SIZE(g3d_clks),
clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
--- a/drivers/clk/mediatek/clk-mt2701-hif.c
+++ b/drivers/clk/mediatek/clk-mt2701-hif.c
@@ -48,8 +48,8 @@ static int clk_mt2701_hif_probe(struct p
clk_data = mtk_alloc_clk_data(CLK_HIFSYS_NR);
- mtk_clk_register_gates(node, hif_clks, ARRAY_SIZE(hif_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, hif_clks,
+ ARRAY_SIZE(hif_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) {
--- a/drivers/clk/mediatek/clk-mt2701-mm.c
+++ b/drivers/clk/mediatek/clk-mt2701-mm.c
@@ -76,8 +76,8 @@ static int clk_mt2701_mm_probe(struct pl
clk_data = mtk_alloc_clk_data(CLK_MM_NR);
- mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, mm_clks,
+ ARRAY_SIZE(mm_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -685,8 +685,8 @@ static int mtk_topckgen_init(struct plat
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt2701_clk_lock, clk_data);
- mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, top_clks,
+ ARRAY_SIZE(top_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
}
@@ -789,8 +789,8 @@ static int mtk_infrasys_init(struct plat
}
}
- mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
- infra_clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, infra_clks,
+ ARRAY_SIZE(infra_clks), infra_clk_data);
mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs),
infra_clk_data);
@@ -902,8 +902,8 @@ static int mtk_pericfg_init(struct platf
if (!clk_data)
return -ENOMEM;
- mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, peri_clks,
+ ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxs, ARRAY_SIZE(peri_muxs), base,
&mt2701_clk_lock, clk_data);
--- a/drivers/clk/mediatek/clk-mt2712-mm.c
+++ b/drivers/clk/mediatek/clk-mt2712-mm.c
@@ -117,8 +117,8 @@ static int clk_mt2712_mm_probe(struct pl
clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
- mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, mm_clks,
+ ARRAY_SIZE(mm_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
--- a/drivers/clk/mediatek/clk-mt2712.c
+++ b/drivers/clk/mediatek/clk-mt2712.c
@@ -1324,8 +1324,8 @@ static int clk_mt2712_top_probe(struct p
&mt2712_clk_lock, top_clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
&mt2712_clk_lock, top_clk_data);
- mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks),
- top_clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, top_clks,
+ ARRAY_SIZE(top_clks), top_clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, top_clk_data);
@@ -1344,8 +1344,8 @@ static int clk_mt2712_infra_probe(struct
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
- mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, infra_clks,
+ ARRAY_SIZE(infra_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -1366,8 +1366,8 @@ static int clk_mt2712_peri_probe(struct
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
- mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, peri_clks,
+ ARRAY_SIZE(peri_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
--- a/drivers/clk/mediatek/clk-mt7622-aud.c
+++ b/drivers/clk/mediatek/clk-mt7622-aud.c
@@ -114,8 +114,8 @@ static int clk_mt7622_audiosys_init(stru
clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
- mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, audio_clks,
+ ARRAY_SIZE(audio_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) {
--- a/drivers/clk/mediatek/clk-mt7622-eth.c
+++ b/drivers/clk/mediatek/clk-mt7622-eth.c
@@ -69,8 +69,8 @@ static int clk_mt7622_ethsys_init(struct
clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK);
- mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, eth_clks,
+ ARRAY_SIZE(eth_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
@@ -91,8 +91,8 @@ static int clk_mt7622_sgmiisys_init(stru
clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK);
- mtk_clk_register_gates(node, sgmii_clks, ARRAY_SIZE(sgmii_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, sgmii_clks,
+ ARRAY_SIZE(sgmii_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
--- a/drivers/clk/mediatek/clk-mt7622-hif.c
+++ b/drivers/clk/mediatek/clk-mt7622-hif.c
@@ -80,8 +80,8 @@ static int clk_mt7622_ssusbsys_init(stru
clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK);
- mtk_clk_register_gates(node, ssusb_clks, ARRAY_SIZE(ssusb_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, ssusb_clks,
+ ARRAY_SIZE(ssusb_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
@@ -102,8 +102,8 @@ static int clk_mt7622_pciesys_init(struc
clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK);
- mtk_clk_register_gates(node, pcie_clks, ARRAY_SIZE(pcie_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, pcie_clks,
+ ARRAY_SIZE(pcie_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -621,8 +621,8 @@ static int mtk_topckgen_init(struct plat
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt7622_clk_lock, clk_data);
- mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, top_clks,
+ ARRAY_SIZE(top_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
}
@@ -635,8 +635,8 @@ static int mtk_infrasys_init(struct plat
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
- mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, infra_clks,
+ ARRAY_SIZE(infra_clks), clk_data);
mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes),
clk_data);
@@ -663,7 +663,7 @@ static int mtk_apmixedsys_init(struct pl
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls),
clk_data);
- mtk_clk_register_gates(node, apmixed_clks,
+ mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -682,8 +682,8 @@ static int mtk_pericfg_init(struct platf
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
- mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, peri_clks,
+ ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
&mt7622_clk_lock, clk_data);
--- a/drivers/clk/mediatek/clk-mt7629-eth.c
+++ b/drivers/clk/mediatek/clk-mt7629-eth.c
@@ -82,7 +82,8 @@ static int clk_mt7629_ethsys_init(struct
if (!clk_data)
return -ENOMEM;
- mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, eth_clks,
+ CLK_ETH_NR_CLK, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
@@ -106,8 +107,8 @@ static int clk_mt7629_sgmiisys_init(stru
if (!clk_data)
return -ENOMEM;
- mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK,
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, sgmii_clks[id++],
+ CLK_SGMII_NR_CLK, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
--- a/drivers/clk/mediatek/clk-mt7629-hif.c
+++ b/drivers/clk/mediatek/clk-mt7629-hif.c
@@ -75,8 +75,8 @@ static int clk_mt7629_ssusbsys_init(stru
clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK);
- mtk_clk_register_gates(node, ssusb_clks, ARRAY_SIZE(ssusb_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, ssusb_clks,
+ ARRAY_SIZE(ssusb_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
@@ -97,8 +97,8 @@ static int clk_mt7629_pciesys_init(struc
clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK);
- mtk_clk_register_gates(node, pcie_clks, ARRAY_SIZE(pcie_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, pcie_clks,
+ ARRAY_SIZE(pcie_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -585,8 +585,8 @@ static int mtk_infrasys_init(struct plat
if (!clk_data)
return -ENOMEM;
- mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, infra_clks,
+ ARRAY_SIZE(infra_clks), clk_data);
mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes),
clk_data);
@@ -610,8 +610,8 @@ static int mtk_pericfg_init(struct platf
if (!clk_data)
return -ENOMEM;
- mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, peri_clks,
+ ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
&mt7629_clk_lock, clk_data);
@@ -637,7 +637,7 @@ static int mtk_apmixedsys_init(struct pl
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls),
clk_data);
- mtk_clk_register_gates(node, apmixed_clks,
+ mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data);
clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk);
--- a/drivers/clk/mediatek/clk-mt7986-eth.c
+++ b/drivers/clk/mediatek/clk-mt7986-eth.c
@@ -72,8 +72,8 @@ static void __init mtk_sgmiisys_0_init(s
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii0_clks));
- mtk_clk_register_gates(node, sgmii0_clks, ARRAY_SIZE(sgmii0_clks),
- clk_data);
+ mtk_clk_register_gates(NULL, node, sgmii0_clks,
+ ARRAY_SIZE(sgmii0_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
@@ -90,8 +90,8 @@ static void __init mtk_sgmiisys_1_init(s
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii1_clks));
- mtk_clk_register_gates(node, sgmii1_clks, ARRAY_SIZE(sgmii1_clks),
- clk_data);
+ mtk_clk_register_gates(NULL, node, sgmii1_clks,
+ ARRAY_SIZE(sgmii1_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -109,7 +109,7 @@ static void __init mtk_ethsys_init(struc
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(eth_clks));
- mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), clk_data);
+ mtk_clk_register_gates(NULL, node, eth_clks, ARRAY_SIZE(eth_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
--- a/drivers/clk/mediatek/clk-mt7986-infracfg.c
+++ b/drivers/clk/mediatek/clk-mt7986-infracfg.c
@@ -180,8 +180,8 @@ static int clk_mt7986_infracfg_probe(str
mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);
mtk_clk_register_muxes(infra_muxes, ARRAY_SIZE(infra_muxes), node,
&mt7986_clk_lock, clk_data);
- mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
- clk_data);
+ mtk_clk_register_gates(&pdev->dev, node, infra_clks,
+ ARRAY_SIZE(infra_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) {
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -459,8 +459,8 @@ int mtk_clk_simple_probe(struct platform
if (!clk_data)
return -ENOMEM;
- r = mtk_clk_register_gates_with_dev(node, mcd->clks, mcd->num_clks,
- clk_data, &pdev->dev);
+ r = mtk_clk_register_gates(&pdev->dev, node, mcd->clks, mcd->num_clks,
+ clk_data);
if (r)
goto free_data;

View File

@ -78,7 +78,7 @@ Signed-off-by: Stephen Boyd <sboyd@kernel.org>
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -761,7 +761,7 @@ static void __init mtk_infrasys_init_ear
@@ -762,7 +762,7 @@ static void __init mtk_infrasys_init_ear
mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs),
infra_clk_data);
@ -89,7 +89,7 @@ Signed-off-by: Stephen Boyd <sboyd@kernel.org>
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
--- a/drivers/clk/mediatek/clk-mt6795-infracfg.c
+++ b/drivers/clk/mediatek/clk-mt6795-infracfg.c
@@ -105,7 +105,8 @@ static int clk_mt6795_infracfg_probe(str
@@ -106,7 +106,8 @@ static int clk_mt6795_infracfg_probe(str
if (ret)
goto free_clk_data;
@ -101,7 +101,7 @@ Signed-off-by: Stephen Boyd <sboyd@kernel.org>
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -638,8 +638,8 @@ static int mtk_infrasys_init(struct plat
@@ -639,8 +639,8 @@ static int mtk_infrasys_init(struct plat
mtk_clk_register_gates(&pdev->dev, node, infra_clks,
ARRAY_SIZE(infra_clks), clk_data);
@ -114,7 +114,7 @@ Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk_data);
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -588,8 +588,8 @@ static int mtk_infrasys_init(struct plat
@@ -589,8 +589,8 @@ static int mtk_infrasys_init(struct plat
mtk_clk_register_gates(&pdev->dev, node, infra_clks,
ARRAY_SIZE(infra_clks), clk_data);
@ -127,8 +127,8 @@ Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk_data);
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -892,8 +892,8 @@ static void __init mtk_infrasys_init(str
clk_data);
@@ -893,8 +893,8 @@ static void __init mtk_infrasys_init(str
ARRAY_SIZE(infra_clks), clk_data);
mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);
- mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),

View File

@ -1,181 +0,0 @@
From f23375db001ec0fe9f565be75eff43adde15407e Mon Sep 17 00:00:00 2001
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: Fri, 20 Jan 2023 10:20:35 +0100
Subject: [PATCH 03/15] clk: mediatek: clk-mtk: Propagate struct device for
composites
Like done for cpumux clocks, propagate struct device for composite
clocks registered through clk-mtk helpers to be able to get runtime
pm support for MTK clocks.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-6-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
[daniel@makrotopia.org: remove parts not relevant for OpenWrt]
---
drivers/clk/mediatek/clk-mt2701.c | 10 ++++++----
drivers/clk/mediatek/clk-mt2712.c | 12 ++++++++----
drivers/clk/mediatek/clk-mt7622.c | 8 +++++---
drivers/clk/mediatek/clk-mt7629.c | 8 +++++---
drivers/clk/mediatek/clk-mtk.c | 11 ++++++-----
drivers/clk/mediatek/clk-mtk.h | 3 ++-
6 files changed, 32 insertions(+), 20 deletions(-)
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -679,8 +679,9 @@ static int mtk_topckgen_init(struct plat
mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
clk_data);
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
- base, &mt2701_clk_lock, clk_data);
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
+ ARRAY_SIZE(top_muxes), base,
+ &mt2701_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt2701_clk_lock, clk_data);
@@ -905,8 +906,9 @@ static int mtk_pericfg_init(struct platf
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
- mtk_clk_register_composites(peri_muxs, ARRAY_SIZE(peri_muxs), base,
- &mt2701_clk_lock, clk_data);
+ mtk_clk_register_composites(&pdev->dev, peri_muxs,
+ ARRAY_SIZE(peri_muxs), base,
+ &mt2701_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
--- a/drivers/clk/mediatek/clk-mt2712.c
+++ b/drivers/clk/mediatek/clk-mt2712.c
@@ -1320,8 +1320,9 @@ static int clk_mt2712_top_probe(struct p
mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs),
top_clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
- &mt2712_clk_lock, top_clk_data);
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
+ ARRAY_SIZE(top_muxes), base,
+ &mt2712_clk_lock, top_clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
&mt2712_clk_lock, top_clk_data);
mtk_clk_register_gates(&pdev->dev, node, top_clks,
@@ -1395,8 +1396,11 @@ static int clk_mt2712_mcu_probe(struct p
clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK);
- mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base,
- &mt2712_clk_lock, clk_data);
+ r = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
+ ARRAY_SIZE(mcu_muxes), base,
+ &mt2712_clk_lock, clk_data);
+ if (r)
+ dev_err(&pdev->dev, "Could not register composites: %d\n", r);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -615,8 +615,9 @@ static int mtk_topckgen_init(struct plat
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data);
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
- base, &mt7622_clk_lock, clk_data);
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
+ ARRAY_SIZE(top_muxes), base,
+ &mt7622_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt7622_clk_lock, clk_data);
@@ -685,7 +686,8 @@ static int mtk_pericfg_init(struct platf
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
- mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
+ mtk_clk_register_composites(&pdev->dev, peri_muxes,
+ ARRAY_SIZE(peri_muxes), base,
&mt7622_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -566,8 +566,9 @@ static int mtk_topckgen_init(struct plat
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data);
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
- base, &mt7629_clk_lock, clk_data);
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
+ ARRAY_SIZE(top_muxes), base,
+ &mt7629_clk_lock, clk_data);
clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk);
clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk);
@@ -613,7 +614,8 @@ static int mtk_pericfg_init(struct platf
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
- mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
+ mtk_clk_register_composites(&pdev->dev, peri_muxes,
+ ARRAY_SIZE(peri_muxes), base,
&mt7629_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -197,8 +197,8 @@ void mtk_clk_unregister_factors(const st
}
EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
-static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc,
- void __iomem *base, spinlock_t *lock)
+static struct clk_hw *mtk_clk_register_composite(struct device *dev,
+ const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
{
struct clk_hw *hw;
struct clk_mux *mux = NULL;
@@ -264,7 +264,7 @@ static struct clk_hw *mtk_clk_register_c
div_ops = &clk_divider_ops;
}
- hw = clk_hw_register_composite(NULL, mc->name, parent_names, num_parents,
+ hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
mux_hw, mux_ops,
div_hw, div_ops,
gate_hw, gate_ops,
@@ -308,7 +308,8 @@ static void mtk_clk_unregister_composite
kfree(mux);
}
-int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
+int mtk_clk_register_composites(struct device *dev,
+ const struct mtk_composite *mcs, int num,
void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data)
{
@@ -327,7 +328,7 @@ int mtk_clk_register_composites(const st
continue;
}
- hw = mtk_clk_register_composite(mc, base, lock);
+ hw = mtk_clk_register_composite(dev, mc, base, lock);
if (IS_ERR(hw)) {
pr_err("Failed to register clk %s: %pe\n", mc->name,
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -149,7 +149,8 @@ struct mtk_composite {
.flags = 0, \
}
-int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
+int mtk_clk_register_composites(struct device *dev,
+ const struct mtk_composite *mcs, int num,
void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data);
void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,

View File

@ -1,103 +0,0 @@
From 5d911479e4c732729bfa798e4a9e3e5aec3e30a7 Mon Sep 17 00:00:00 2001
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: Fri, 20 Jan 2023 10:20:36 +0100
Subject: [PATCH 04/15] clk: mediatek: clk-mux: Propagate struct device for
mtk-mux
Like done for other clocks, propagate struct device for mtk mux clocks
registered through clk-mux helpers to enable runtime pm support.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-7-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
[daniel@makrotopia.org: removed parts not relevant for OpenWrt]
---
drivers/clk/mediatek/clk-mt7986-infracfg.c | 3 ++-
drivers/clk/mediatek/clk-mt7986-topckgen.c | 3 ++-
drivers/clk/mediatek/clk-mux.c | 14 ++++++++------
drivers/clk/mediatek/clk-mux.h | 3 ++-
4 files changed, 14 insertions(+), 9 deletions(-)
--- a/drivers/clk/mediatek/clk-mt7986-infracfg.c
+++ b/drivers/clk/mediatek/clk-mt7986-infracfg.c
@@ -178,7 +178,8 @@ static int clk_mt7986_infracfg_probe(str
return -ENOMEM;
mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);
- mtk_clk_register_muxes(infra_muxes, ARRAY_SIZE(infra_muxes), node,
+ mtk_clk_register_muxes(&pdev->dev, infra_muxes,
+ ARRAY_SIZE(infra_muxes), node,
&mt7986_clk_lock, clk_data);
mtk_clk_register_gates(&pdev->dev, node, infra_clks,
ARRAY_SIZE(infra_clks), clk_data);
--- a/drivers/clk/mediatek/clk-mt7986-topckgen.c
+++ b/drivers/clk/mediatek/clk-mt7986-topckgen.c
@@ -303,7 +303,8 @@ static int clk_mt7986_topckgen_probe(str
mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
- mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node,
+ mtk_clk_register_muxes(&pdev->dev, top_muxes,
+ ARRAY_SIZE(top_muxes), node,
&mt7986_clk_lock, clk_data);
clk_prepare_enable(clk_data->hws[CLK_TOP_SYSAXI_SEL]->clk);
--- a/drivers/clk/mediatek/clk-mux.c
+++ b/drivers/clk/mediatek/clk-mux.c
@@ -154,9 +154,10 @@ const struct clk_ops mtk_mux_gate_clr_se
};
EXPORT_SYMBOL_GPL(mtk_mux_gate_clr_set_upd_ops);
-static struct clk_hw *mtk_clk_register_mux(const struct mtk_mux *mux,
- struct regmap *regmap,
- spinlock_t *lock)
+static struct clk_hw *mtk_clk_register_mux(struct device *dev,
+ const struct mtk_mux *mux,
+ struct regmap *regmap,
+ spinlock_t *lock)
{
struct mtk_clk_mux *clk_mux;
struct clk_init_data init = {};
@@ -177,7 +178,7 @@ static struct clk_hw *mtk_clk_register_m
clk_mux->lock = lock;
clk_mux->hw.init = &init;
- ret = clk_hw_register(NULL, &clk_mux->hw);
+ ret = clk_hw_register(dev, &clk_mux->hw);
if (ret) {
kfree(clk_mux);
return ERR_PTR(ret);
@@ -198,7 +199,8 @@ static void mtk_clk_unregister_mux(struc
kfree(mux);
}
-int mtk_clk_register_muxes(const struct mtk_mux *muxes,
+int mtk_clk_register_muxes(struct device *dev,
+ const struct mtk_mux *muxes,
int num, struct device_node *node,
spinlock_t *lock,
struct clk_hw_onecell_data *clk_data)
@@ -222,7 +224,7 @@ int mtk_clk_register_muxes(const struct
continue;
}
- hw = mtk_clk_register_mux(mux, regmap, lock);
+ hw = mtk_clk_register_mux(dev, mux, regmap, lock);
if (IS_ERR(hw)) {
pr_err("Failed to register clk %s: %pe\n", mux->name,
--- a/drivers/clk/mediatek/clk-mux.h
+++ b/drivers/clk/mediatek/clk-mux.h
@@ -83,7 +83,8 @@ extern const struct clk_ops mtk_mux_gate
0, _upd_ofs, _upd, CLK_SET_RATE_PARENT, \
mtk_mux_clr_set_upd_ops)
-int mtk_clk_register_muxes(const struct mtk_mux *muxes,
+int mtk_clk_register_muxes(struct device *dev,
+ const struct mtk_mux *muxes,
int num, struct device_node *node,
spinlock_t *lock,
struct clk_hw_onecell_data *clk_data);

View File

@ -21,9 +21,9 @@ Signed-off-by: Stephen Boyd <sboyd@kernel.org>
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -18,6 +18,22 @@
#include "clk-mtk.h"
@@ -21,6 +21,22 @@
#include "clk-gate.h"
#include "clk-mux.h"
+const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
+EXPORT_SYMBOL_GPL(cg_regs_dummy);

View File

@ -1,189 +0,0 @@
From 7b6183108c8ccf0dc295f39cdf78bd8078455636 Mon Sep 17 00:00:00 2001
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: Fri, 20 Jan 2023 10:20:42 +0100
Subject: [PATCH] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()
As a preparation to increase probe functions commonization across
various MediaTek SoC clock controller drivers, extend function
mtk_clk_simple_probe() to be able to register not only gates, but
also fixed clocks, factors, muxes and composites.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-13-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/mediatek/clk-mtk.c | 101 ++++++++++++++++++++++++++++++---
drivers/clk/mediatek/clk-mtk.h | 10 ++++
2 files changed, 103 insertions(+), 8 deletions(-)
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -11,12 +11,14 @@
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include "clk-mtk.h"
#include "clk-gate.h"
+#include "clk-mux.h"
const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
EXPORT_SYMBOL_GPL(cg_regs_dummy);
@@ -466,20 +468,71 @@ int mtk_clk_simple_probe(struct platform
const struct mtk_clk_desc *mcd;
struct clk_hw_onecell_data *clk_data;
struct device_node *node = pdev->dev.of_node;
- int r;
+ void __iomem *base;
+ int num_clks, r;
mcd = of_device_get_match_data(&pdev->dev);
if (!mcd)
return -EINVAL;
- clk_data = mtk_alloc_clk_data(mcd->num_clks);
+ /* Composite clocks needs us to pass iomem pointer */
+ if (mcd->composite_clks) {
+ if (!mcd->shared_io)
+ base = devm_platform_ioremap_resource(pdev, 0);
+ else
+ base = of_iomap(node, 0);
+
+ if (IS_ERR_OR_NULL(base))
+ return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM;
+ }
+
+ /* Calculate how many clk_hw_onecell_data entries to allocate */
+ num_clks = mcd->num_clks + mcd->num_composite_clks;
+ num_clks += mcd->num_fixed_clks + mcd->num_factor_clks;
+ num_clks += mcd->num_mux_clks;
+
+ clk_data = mtk_alloc_clk_data(num_clks);
if (!clk_data)
return -ENOMEM;
- r = mtk_clk_register_gates(&pdev->dev, node, mcd->clks, mcd->num_clks,
- clk_data);
- if (r)
- goto free_data;
+ if (mcd->fixed_clks) {
+ r = mtk_clk_register_fixed_clks(mcd->fixed_clks,
+ mcd->num_fixed_clks, clk_data);
+ if (r)
+ goto free_data;
+ }
+
+ if (mcd->factor_clks) {
+ r = mtk_clk_register_factors(mcd->factor_clks,
+ mcd->num_factor_clks, clk_data);
+ if (r)
+ goto unregister_fixed_clks;
+ }
+
+ if (mcd->mux_clks) {
+ r = mtk_clk_register_muxes(&pdev->dev, mcd->mux_clks,
+ mcd->num_mux_clks, node,
+ mcd->clk_lock, clk_data);
+ if (r)
+ goto unregister_factors;
+ };
+
+ if (mcd->composite_clks) {
+ /* We don't check composite_lock because it's optional */
+ r = mtk_clk_register_composites(&pdev->dev,
+ mcd->composite_clks,
+ mcd->num_composite_clks,
+ base, mcd->clk_lock, clk_data);
+ if (r)
+ goto unregister_muxes;
+ }
+
+ if (mcd->clks) {
+ r = mtk_clk_register_gates(&pdev->dev, node, mcd->clks,
+ mcd->num_clks, clk_data);
+ if (r)
+ goto unregister_composites;
+ }
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
@@ -497,9 +550,28 @@ int mtk_clk_simple_probe(struct platform
return r;
unregister_clks:
- mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
+ if (mcd->clks)
+ mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
+unregister_composites:
+ if (mcd->composite_clks)
+ mtk_clk_unregister_composites(mcd->composite_clks,
+ mcd->num_composite_clks, clk_data);
+unregister_muxes:
+ if (mcd->mux_clks)
+ mtk_clk_unregister_muxes(mcd->mux_clks,
+ mcd->num_mux_clks, clk_data);
+unregister_factors:
+ if (mcd->factor_clks)
+ mtk_clk_unregister_factors(mcd->factor_clks,
+ mcd->num_factor_clks, clk_data);
+unregister_fixed_clks:
+ if (mcd->fixed_clks)
+ mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
+ mcd->num_fixed_clks, clk_data);
free_data:
mtk_free_clk_data(clk_data);
+ if (mcd->shared_io && base)
+ iounmap(base);
return r;
}
EXPORT_SYMBOL_GPL(mtk_clk_simple_probe);
@@ -511,7 +583,20 @@ int mtk_clk_simple_remove(struct platfor
struct device_node *node = pdev->dev.of_node;
of_clk_del_provider(node);
- mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
+ if (mcd->clks)
+ mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
+ if (mcd->composite_clks)
+ mtk_clk_unregister_composites(mcd->composite_clks,
+ mcd->num_composite_clks, clk_data);
+ if (mcd->mux_clks)
+ mtk_clk_unregister_muxes(mcd->mux_clks,
+ mcd->num_mux_clks, clk_data);
+ if (mcd->factor_clks)
+ mtk_clk_unregister_factors(mcd->factor_clks,
+ mcd->num_factor_clks, clk_data);
+ if (mcd->fixed_clks)
+ mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
+ mcd->num_fixed_clks, clk_data);
mtk_free_clk_data(clk_data);
return 0;
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -215,7 +215,17 @@ void mtk_clk_unregister_ref2usb_tx(struc
struct mtk_clk_desc {
const struct mtk_gate *clks;
size_t num_clks;
+ const struct mtk_composite *composite_clks;
+ size_t num_composite_clks;
+ const struct mtk_fixed_clk *fixed_clks;
+ size_t num_fixed_clks;
+ const struct mtk_fixed_factor *factor_clks;
+ size_t num_factor_clks;
+ const struct mtk_mux *mux_clks;
+ size_t num_mux_clks;
const struct mtk_clk_rst_desc *rst_desc;
+ spinlock_t *clk_lock;
+ bool shared_io;
};
int mtk_clk_simple_probe(struct platform_device *pdev);

View File

@ -258,7 +258,7 @@ Signed-off-by: Michael Gray <michael.gray@lantisproject.com>
static int kernel_init(void *);
extern void init_IRQ(void);
@@ -994,6 +998,18 @@ asmlinkage __visible void __init __no_sa
@@ -996,6 +1000,18 @@ asmlinkage __visible void __init __no_sa
page_alloc_init();
pr_notice("Kernel command line: %s\n", saved_command_line);

View File

@ -236,6 +236,7 @@ CONFIG_MICROCODE_INTEL=y
CONFIG_MICROCODE_LATE_LOADING=y
CONFIG_MIGRATION=y
CONFIG_MITIGATION_RFDS=y
CONFIG_MITIGATION_SPECTRE_BHI=y
# CONFIG_MK6 is not set
# CONFIG_MK7 is not set
# CONFIG_MK8 is not set
@ -351,9 +352,6 @@ CONFIG_SG_POOL=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM_STATIC=y
CONFIG_SPARSE_IRQ=y
# CONFIG_SPECTRE_BHI_AUTO is not set
# CONFIG_SPECTRE_BHI_OFF is not set
CONFIG_SPECTRE_BHI_ON=y
CONFIG_SPECULATION_MITIGATIONS=y
CONFIG_SRCU=y
# CONFIG_STATIC_CALL_SELFTEST is not set