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mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-06-13 18:53:52 +02:00

ramips: add support for YunCore G720

The YunCore G720 is a dual band 802.11ax router with 5 GbE ports.

Specs:
- SoC: MediaTek MT7621
- Ethernet: 5x GbE ports (built-in MT7530)
- Wireless 2.4GHz / 5GHz: MediaTek MT7915E
- RAM: 256MiB
- ROM: 16MiB (W25Q128)
- 1 Button (reset)
- 8 LEDs (1x system, 2x wifi, 5x switch ports)

Flash instructions:
The vendor firmware is based on OpenWrt, the sysupgrade image can be
flashed using the '-F' (force) option on the CLI.
Make sure not to keep settings when doing so.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2024-03-08 20:20:23 +00:00
parent 1576474f55
commit 65df33fc76
4 changed files with 202 additions and 2 deletions

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@ -0,0 +1,188 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7621.dtsi"
/ {
compatible = "yuncore,g720", "mediatek,mt7621-soc";
model = "YunCore G720";
aliases {
label-mac-device = &wifi0;
led-boot = &led_sys_red;
led-failsafe = &led_sys_red;
led-running = &led_sys_red;
led-upgrade = &led_sys_red;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led_sys_red: led-sys {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <200>;
always-running;
};
};
&gpio {
s1 {
gpio-hog;
line-name = "s1";
gpios = <4 GPIO_ACTIVE_LOW>;
output-high;
};
s2 {
gpio-hog;
line-name = "s2";
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "factory";
reg = <0x50000 0x40000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0xe00>;
};
macaddr_factory_e000: macaddr@e000 {
reg = <0xe000 0x6>;
};
macaddr_factory_e006: macaddr@e006 {
reg = <0xe006 0x6>;
};
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x90000 0xf70000>;
};
};
};
};
&gmac0 {
nvmem-cells = <&macaddr_factory_e000>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy4>;
nvmem-cells = <&macaddr_factory_e006>;
nvmem-cell-names = "mac-address";
};
&mdio {
ethphy4: ethernet-phy@4 {
reg = <4>;
};
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan1";
};
port@1 {
status = "okay";
label = "lan2";
};
port@2 {
status = "okay";
label = "lan3";
};
port@3 {
status = "okay";
label = "lan4";
};
};
};
&pcie {
status = "okay";
};
&pcie1 {
wifi0: wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
};
&state_default {
gpio {
groups = "jtag", "wdt";
function = "gpio";
};
};

View File

@ -2918,6 +2918,16 @@ define Device/yuncore_fap690
endef
TARGET_DEVICES += yuncore_fap690
define Device/yuncore_g720
$(Device/dsa-migration)
DEVICE_VENDOR := YunCore
DEVICE_MODEL := G720
DEVICE_PACKAGES := kmod-mt7915-firmware
IMAGE_SIZE := 15808k
SUPPORTED_DEVICES += mt7621-rfb-ax-nor
endef
TARGET_DEVICES += yuncore_g720
define Device/zbtlink_zbt-we1326
$(Device/dsa-migration)
$(Device/uimage-lzma-loader)

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@ -30,7 +30,8 @@ asus,rt-ax53u)
ucidef_set_led_wlan "wlan2g" "WiFi 2.4GHz" "mt76-phy0" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WiFi 5GHz" "mt76-phy1" "phy1tpt"
;;
asus,rt-ax54)
asus,rt-ax54|\
yuncore,g720)
ucidef_set_led_wlan "wlan2g" "WiFi 2.4GHz" "mt76-phy0" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WiFi 5GHz" "mt76-phy1" "phy1tpt"
;;

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@ -184,7 +184,8 @@ case "$board" in
hw_mac_addr="$(mtd_get_mac_binary rom_file 0xf100)"
[ "$PHYNBR" = "1" ] && macaddr_add "$hw_mac_addr" 2 > "/sys${DEVPATH}/macaddress"
;;
yuncore,ax820)
yuncore,ax820|\
yuncore,g720)
[ "$PHYNBR" = "1" ] && \
macaddr_setbit_la "$(mtd_get_mac_binary Factory 0xe000)" > /sys${DEVPATH}/macaddress
;;