From 269758a5bcea1376d037dfea62f161ff8562e489 Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Tue, 8 Jun 2021 23:10:18 +0800 Subject: [PATCH] ipq806x: Askey RT4230W REV6: use usual writing for pcie part The problem has been fixed in f47cb405cafd ("ipq806x: fix pci broken on bootm command"), now the pcie part can be written in the usual way. Signed-off-by: Chukun Pan Reviewed-by: Ansuel Smith --- .../files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts index 54356e2ff1..0ad2dfa57b 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts @@ -294,14 +294,16 @@ &pcie0 { status = "okay"; reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; - /delete-property/ perst-gpios; + pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; }; &pcie1 { status = "okay"; reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; - /delete-property/ perst-gpios; - force_gen1 = <1>; + pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + max-link-speed = <1>; }; &ART {