1
0
mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-06-13 10:49:13 +02:00

kernel: update mt7530 EEE patch from upstream

The new EEE patch is accepted upstream, so backport it and replace the
current one.

Cc: René van Dorst <opensource@vdorst.com>
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
This commit is contained in:
DENG Qingfang 2021-04-22 13:08:11 +08:00 committed by Hauke Mehrtens
parent 0d6f207230
commit 20a924d2ae
4 changed files with 240 additions and 242 deletions

View File

@ -0,0 +1,120 @@
From 40b5d2f15c091fa9c854acde91ad2acb504027d7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
Date: Mon, 12 Apr 2021 08:50:31 +0200
Subject: [PATCH] net: dsa: mt7530: Add support for EEE features
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch adds EEE support.
Signed-off-by: René van Dorst <opensource@vdorst.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/mt7530.c | 43 ++++++++++++++++++++++++++++++++++++++++
drivers/net/dsa/mt7530.h | 14 ++++++++++++-
2 files changed, 56 insertions(+), 1 deletion(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2277,6 +2277,17 @@ static void mt753x_phylink_mac_link_up(s
mcr |= PMCR_RX_FC_EN;
}
+ if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, 0) >= 0) {
+ switch (speed) {
+ case SPEED_1000:
+ mcr |= PMCR_FORCE_EEE1G;
+ break;
+ case SPEED_100:
+ mcr |= PMCR_FORCE_EEE100;
+ break;
+ }
+ }
+
mt7530_set(priv, MT7530_PMCR_P(port), mcr);
}
@@ -2507,6 +2518,36 @@ mt753x_phy_write(struct dsa_switch *ds,
return priv->info->phy_write(ds, port, regnum, val);
}
+static int mt753x_get_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+
+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
+ e->tx_lpi_timer = GET_LPI_THRESH(eeecr);
+
+ return 0;
+}
+
+static int mt753x_set_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 set, mask = LPI_THRESH_MASK | LPI_MODE_EN;
+
+ if (e->tx_lpi_timer > 0xFFF)
+ return -EINVAL;
+
+ set = SET_LPI_THRESH(e->tx_lpi_timer);
+ if (!e->tx_lpi_enabled)
+ /* Force LPI Mode without a delay */
+ set |= LPI_MODE_EN;
+ mt7530_rmw(priv, MT7530_PMEEECR_P(port), mask, set);
+
+ return 0;
+}
+
static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt753x_setup,
@@ -2535,6 +2576,8 @@ static const struct dsa_switch_ops mt753
.phylink_mac_an_restart = mt753x_phylink_mac_an_restart,
.phylink_mac_link_down = mt753x_phylink_mac_link_down,
.phylink_mac_link_up = mt753x_phylink_mac_link_up,
+ .get_mac_eee = mt753x_get_mac_eee,
+ .set_mac_eee = mt753x_set_mac_eee,
};
static const struct mt753x_info mt753x_table[] = {
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -240,6 +240,8 @@ enum mt7530_vlan_port_attr {
#define PMCR_RX_EN BIT(13)
#define PMCR_BACKOFF_EN BIT(9)
#define PMCR_BACKPR_EN BIT(8)
+#define PMCR_FORCE_EEE1G BIT(7)
+#define PMCR_FORCE_EEE100 BIT(6)
#define PMCR_TX_FC_EN BIT(5)
#define PMCR_RX_FC_EN BIT(4)
#define PMCR_FORCE_SPEED_1000 BIT(3)
@@ -264,7 +266,8 @@ enum mt7530_vlan_port_attr {
#define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \
PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \
PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
- PMCR_FORCE_FDX | PMCR_FORCE_LNK)
+ PMCR_FORCE_FDX | PMCR_FORCE_LNK | \
+ PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100)
#define PMCR_CPU_PORT_SETTING(id) (PMCR_FORCE_MODE_ID((id)) | \
PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \
PMCR_BACKOFF_EN | PMCR_BACKPR_EN | \
@@ -273,6 +276,15 @@ enum mt7530_vlan_port_attr {
PMCR_FORCE_SPEED_1000 | \
PMCR_FORCE_FDX | PMCR_FORCE_LNK)
+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
+#define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24)
+#define WAKEUP_TIME_100(x) (((x) & 0xFF) << 16)
+#define LPI_THRESH_MASK GENMASK(15, 4)
+#define LPI_THRESH_SHT 4
+#define SET_LPI_THRESH(x) (((x) << LPI_THRESH_SHT) & LPI_THRESH_MASK)
+#define GET_LPI_THRESH(x) (((x) & LPI_THRESH_MASK) >> LPI_THRESH_SHT)
+#define LPI_MODE_EN BIT(0)
+
#define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100)
#define PMSR_EEE1G BIT(7)
#define PMSR_EEE100M BIT(6)

View File

@ -0,0 +1,120 @@
From 40b5d2f15c091fa9c854acde91ad2acb504027d7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
Date: Mon, 12 Apr 2021 08:50:31 +0200
Subject: [PATCH] net: dsa: mt7530: Add support for EEE features
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch adds EEE support.
Signed-off-by: René van Dorst <opensource@vdorst.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/mt7530.c | 46 +++++++++++++++++++++++++++++++++++++++-
drivers/net/dsa/mt7530.h | 11 ++++++++++
2 files changed, 56 insertions(+), 1 deletion(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1406,7 +1406,8 @@ static void mt7530_phylink_mac_config(st
mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
mcr_new = mcr_cur;
mcr_new &= ~(PMCR_FORCE_SPEED_1000 | PMCR_FORCE_SPEED_100 |
- PMCR_FORCE_FDX | PMCR_TX_FC_EN | PMCR_RX_FC_EN);
+ PMCR_FORCE_FDX | PMCR_TX_FC_EN | PMCR_RX_FC_EN |
+ PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100);
mcr_new |= PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | PMCR_BACKOFF_EN |
PMCR_BACKPR_EN | PMCR_FORCE_MODE;
@@ -1430,6 +1431,17 @@ static void mt7530_phylink_mac_config(st
mcr_new |= PMCR_RX_FC_EN;
}
+ if (mode == MLO_AN_PHY) {
+ switch (state->speed) {
+ case SPEED_1000:
+ mcr_new |= PMCR_FORCE_EEE1G;
+ break;
+ case SPEED_100:
+ mcr_new |= PMCR_FORCE_EEE100;
+ break;
+ }
+ }
+
if (mcr_new != mcr_cur)
mt7530_write(priv, MT7530_PMCR_P(port), mcr_new);
}
@@ -1555,6 +1567,36 @@ mt7530_phylink_mac_link_state(struct dsa
return 1;
}
+static int mt753x_get_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+
+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
+ e->tx_lpi_timer = GET_LPI_THRESH(eeecr);
+
+ return 0;
+}
+
+static int mt753x_set_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 set, mask = LPI_THRESH_MASK | LPI_MODE_EN;
+
+ if (e->tx_lpi_timer > 0xFFF)
+ return -EINVAL;
+
+ set = SET_LPI_THRESH(e->tx_lpi_timer);
+ if (!e->tx_lpi_enabled)
+ /* Force LPI Mode without a delay */
+ set |= LPI_MODE_EN;
+ mt7530_rmw(priv, MT7530_PMEEECR_P(port), mask, set);
+
+ return 0;
+}
+
static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt7530_setup,
@@ -1582,6 +1624,8 @@ static const struct dsa_switch_ops mt753
.phylink_mac_config = mt7530_phylink_mac_config,
.phylink_mac_link_down = mt7530_phylink_mac_link_down,
.phylink_mac_link_up = mt7530_phylink_mac_link_up,
+ .get_mac_eee = mt753x_get_mac_eee,
+ .set_mac_eee = mt753x_set_mac_eee,
};
static const struct of_device_id mt7530_of_match[] = {
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -212,6 +212,8 @@ enum mt7530_vlan_port_attr {
#define PMCR_RX_EN BIT(13)
#define PMCR_BACKOFF_EN BIT(9)
#define PMCR_BACKPR_EN BIT(8)
+#define PMCR_FORCE_EEE1G BIT(7)
+#define PMCR_FORCE_EEE100 BIT(6)
#define PMCR_TX_FC_EN BIT(5)
#define PMCR_RX_FC_EN BIT(4)
#define PMCR_FORCE_SPEED_1000 BIT(3)
@@ -221,6 +223,15 @@ enum mt7530_vlan_port_attr {
#define PMCR_SPEED_MASK (PMCR_FORCE_SPEED_100 | \
PMCR_FORCE_SPEED_1000)
+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
+#define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24)
+#define WAKEUP_TIME_100(x) (((x) & 0xFF) << 16)
+#define LPI_THRESH_MASK GENMASK(15, 4)
+#define LPI_THRESH_SHT 4
+#define SET_LPI_THRESH(x) (((x) << LPI_THRESH_SHT) & LPI_THRESH_MASK)
+#define GET_LPI_THRESH(x) (((x) & LPI_THRESH_MASK) >> LPI_THRESH_SHT)
+#define LPI_MODE_EN BIT(0)
+
#define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100)
#define PMSR_EEE1G BIT(7)
#define PMSR_EEE100M BIT(6)

View File

@ -1,121 +0,0 @@
From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
Date: Tue, 21 Apr 2020 00:18:08 +0200
Subject: [PATCH] net: dsa: mt7530: Support EEE features
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: René van Dorst <opensource@vdorst.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2264,9 +2264,13 @@ static void mt753x_phylink_mac_link_up(s
switch (speed) {
case SPEED_1000:
mcr |= PMCR_FORCE_SPEED_1000;
+ if (priv->eee_enable & BIT(port))
+ mcr |= PMCR_FORCE_EEE1G;
break;
case SPEED_100:
mcr |= PMCR_FORCE_SPEED_100;
+ if (priv->eee_enable & BIT(port))
+ mcr |= PMCR_FORCE_EEE100;
break;
}
if (duplex == DUPLEX_FULL) {
@@ -2507,6 +2511,54 @@ mt753x_phy_write(struct dsa_switch *ds,
return priv->info->phy_write(ds, port, regnum, val);
}
+static int mt7530_get_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr, pmsr;
+
+ e->eee_enabled = !!(priv->eee_enable & BIT(port));
+
+ if (e->eee_enabled) {
+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
+ e->tx_lpi_timer = (eeecr >> 4) & 0xFFF;
+ pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
+ e->eee_active = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
+ } else {
+ e->tx_lpi_enabled = 0;
+ e->tx_lpi_timer = 0;
+ e->eee_active = 0;
+ }
+
+ return 0;
+}
+
+static int mt7530_set_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr;
+
+ if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF)
+ return -EINVAL;
+
+ if (e->eee_enabled) {
+ priv->eee_enable |= BIT(port);
+ //MT7530_PMEEECR_P
+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+ eeecr &= 0xFFFF0000;
+ if (!e->tx_lpi_enabled)
+ eeecr |= LPI_MODE_EN;
+ eeecr = LPI_THRESH(e->tx_lpi_timer);
+ mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
+ } else {
+ priv->eee_enable &= ~(BIT(port));
+ }
+
+ return 0;
+}
+
static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt753x_setup,
@@ -2535,6 +2587,8 @@ static const struct dsa_switch_ops mt753
.phylink_mac_an_restart = mt753x_phylink_mac_an_restart,
.phylink_mac_link_down = mt753x_phylink_mac_link_down,
.phylink_mac_link_up = mt753x_phylink_mac_link_up,
+ .get_mac_eee = mt7530_get_mac_eee,
+ .set_mac_eee = mt7530_set_mac_eee,
};
static const struct mt753x_info mt753x_table[] = {
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -240,6 +240,8 @@ enum mt7530_vlan_port_attr {
#define PMCR_RX_EN BIT(13)
#define PMCR_BACKOFF_EN BIT(9)
#define PMCR_BACKPR_EN BIT(8)
+#define PMCR_FORCE_EEE1G BIT(7)
+#define PMCR_FORCE_EEE100 BIT(6)
#define PMCR_TX_FC_EN BIT(5)
#define PMCR_RX_FC_EN BIT(4)
#define PMCR_FORCE_SPEED_1000 BIT(3)
@@ -289,6 +291,12 @@ enum mt7530_vlan_port_attr {
#define MT7531_DBG_CNT(x) (0x3018 + (x) * 0x100)
#define MT7531_DIS_CLR BIT(31)
+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
+#define WAKEUP_TIME_1000(x) ((x & 0xFF) << 24)
+#define WAKEUP_TIME_100(x) ((x & 0xFF) << 16)
+#define LPI_THRESH(x) ((x & 0xFFF) << 4)
+#define LPI_MODE_EN BIT(0)
+
/* Register for MIB */
#define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100)
#define MT7530_MIB_CCR 0x4fe0
@@ -732,6 +740,7 @@ struct mt7530_priv {
unsigned int p5_intf_sel;
u8 mirror_rx;
u8 mirror_tx;
+ u8 eee_enable;
struct mt7530_port ports[MT7530_NUM_PORTS];
/* protect among processes for registers access*/

View File

@ -1,121 +0,0 @@
From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
Date: Tue, 21 Apr 2020 00:18:08 +0200
Subject: [PATCH] net: dsa: mt7530: Support EEE features
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: René van Dorst <opensource@vdorst.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1417,9 +1417,13 @@ static void mt7530_phylink_mac_config(st
switch (state->speed) {
case SPEED_1000:
mcr_new |= PMCR_FORCE_SPEED_1000;
+ if (priv->eee_enable & BIT(port))
+ mcr_new |= PMCR_FORCE_EEE1G;
break;
case SPEED_100:
mcr_new |= PMCR_FORCE_SPEED_100;
+ if (priv->eee_enable & BIT(port))
+ mcr_new |= PMCR_FORCE_EEE100;
break;
}
if (state->duplex == DUPLEX_FULL) {
@@ -1555,6 +1559,54 @@ mt7530_phylink_mac_link_state(struct dsa
return 1;
}
+static int mt7530_get_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr, pmsr;
+
+ e->eee_enabled = !!(priv->eee_enable & BIT(port));
+
+ if (e->eee_enabled) {
+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
+ e->tx_lpi_timer = (eeecr >> 4) & 0xFFF;
+ pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
+ e->eee_active = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
+ } else {
+ e->tx_lpi_enabled = 0;
+ e->tx_lpi_timer = 0;
+ e->eee_active = 0;
+ }
+
+ return 0;
+}
+
+static int mt7530_set_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr;
+
+ if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF)
+ return -EINVAL;
+
+ if (e->eee_enabled) {
+ priv->eee_enable |= BIT(port);
+ //MT7530_PMEEECR_P
+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+ eeecr &= 0xFFFF0000;
+ if (!e->tx_lpi_enabled)
+ eeecr |= LPI_MODE_EN;
+ eeecr = LPI_THRESH(e->tx_lpi_timer);
+ mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
+ } else {
+ priv->eee_enable &= ~(BIT(port));
+ }
+
+ return 0;
+}
+
static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt7530_setup,
@@ -1582,6 +1634,8 @@ static const struct dsa_switch_ops mt753
.phylink_mac_config = mt7530_phylink_mac_config,
.phylink_mac_link_down = mt7530_phylink_mac_link_down,
.phylink_mac_link_up = mt7530_phylink_mac_link_up,
+ .get_mac_eee = mt7530_get_mac_eee,
+ .set_mac_eee = mt7530_set_mac_eee,
};
static const struct of_device_id mt7530_of_match[] = {
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -212,6 +212,8 @@ enum mt7530_vlan_port_attr {
#define PMCR_RX_EN BIT(13)
#define PMCR_BACKOFF_EN BIT(9)
#define PMCR_BACKPR_EN BIT(8)
+#define PMCR_FORCE_EEE1G BIT(7)
+#define PMCR_FORCE_EEE100 BIT(6)
#define PMCR_TX_FC_EN BIT(5)
#define PMCR_RX_FC_EN BIT(4)
#define PMCR_FORCE_SPEED_1000 BIT(3)
@@ -233,6 +235,12 @@ enum mt7530_vlan_port_attr {
#define PMSR_DPX BIT(1)
#define PMSR_LINK BIT(0)
+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
+#define WAKEUP_TIME_1000(x) ((x & 0xFF) << 24)
+#define WAKEUP_TIME_100(x) ((x & 0xFF) << 16)
+#define LPI_THRESH(x) ((x & 0xFFF) << 4)
+#define LPI_MODE_EN BIT(0)
+
/* Register for MIB */
#define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100)
#define MT7530_MIB_CCR 0x4fe0
@@ -471,6 +479,7 @@ struct mt7530_priv {
unsigned int p5_intf_sel;
u8 mirror_rx;
u8 mirror_tx;
+ u8 eee_enable;
struct mt7530_port ports[MT7530_NUM_PORTS];
/* protect among processes for registers access*/