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ramips: mt7621: add new NAND driver

Add new NAND driver for MT7621

Signed-off-by: DENG Qingfang <dengqf6@mail2.sysu.edu.cn>
This commit is contained in:
DENG Qingfang 2020-04-01 11:19:12 +08:00 committed by Chuanhong Guo
parent 92daa06f22
commit 10f27c6f00
4 changed files with 1496 additions and 2 deletions

View File

@ -414,13 +414,23 @@
};
};
nficlock: nficlock {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <125000000>;
};
nand: nand@1e003000 {
status = "disabled";
compatible = "mtk,mt7621-nand";
bank-width = <2>;
compatible = "mediatek,mt7621-nfc";
reg = <0x1e003000 0x800
0x1e003800 0x800>;
reg-names = "nfi", "ecc";
clocks = <&nficlock>;
clock-names = "nfi_clk";
};
ethsys: syscon@1e000000 {

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@ -202,6 +202,7 @@ CONFIG_MT7621_WDT=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_MT7621=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y

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@ -0,0 +1,85 @@
From 3d5f4da8296b23eb3abf8b13122b0d06a215e79c Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 1 Apr 2020 02:07:59 +0800
Subject: [PATCH 2/2] dt-bindings: add documentation for mt7621-nand driver
This patch adds documentation for MediaTek MT7621 NAND flash controller
driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
.../bindings/mtd/mediatek,mt7621-nfc.yaml | 68 ++++++++++++++++++++++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/mediatek,mt7621-nfc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek MT7621 SoC NAND Flash Controller (NFC) DT binding
+
+maintainers:
+ - Weijie Gao <weijie.gao@mediatek.com>
+
+description: |
+ This driver uses a single node to describe both NAND Flash controller
+ interface (NFI) and ECC engine for MT7621 SoC.
+ MT7621 supports only one chip select.
+
+properties:
+ "#address-cells": false
+ "#size-cells": false
+
+ compatible:
+ enum:
+ - mediatek,mt7621-nfc
+
+ reg:
+ items:
+ - description: Register base of NFI core
+ - description: Register base of ECC engine
+
+ reg-names:
+ items:
+ - const: nfi
+ - const: ecc
+
+ clocks:
+ items:
+ - description: Source clock for NFI core, fixed 125MHz
+
+ clock-names:
+ items:
+ - const: nfi_clk
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+
+examples:
+ - |
+ nficlock: nficlock {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+
+ clock-frequency = <125000000>;
+ };
+
+ nand@1e003000 {
+ compatible = "mediatek,mt7621-nfc";
+
+ reg = <0x1e003000 0x800
+ 0x1e003800 0x800>;
+ reg-names = "nfi", "ecc";
+
+ clocks = <&nficlock>;
+ clock-names = "nfi_clk";
+ };