mediatek: change dts to use the new snand driver

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit is contained in:
Chuanhong Guo 2021-08-24 12:04:51 +08:00
parent c6ed31630d
commit 01b452fe2d
7 changed files with 160 additions and 245 deletions

View File

@ -430,10 +430,6 @@
}; };
}; };
&bch {
status = "okay";
};
&btif { &btif {
status = "disabled"; status = "disabled";
}; };
@ -501,62 +497,55 @@
status = "okay"; status = "okay";
}; };
&snfi { &snand {
mediatek,quad-spi;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>; pinctrl-0 = <&serial_nand_pins>;
status = "okay"; status = "okay";
spi_nand@0 { partitions {
compatible = "fixed-partitions";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
partitions { partition@0 {
compatible = "fixed-partitions"; label = "Preloader";
#address-cells = <1>; reg = <0x00000 0x0080000>;
#size-cells = <1>; read-only;
};
partition@0 { partition@80000 {
label = "Preloader"; label = "ATF";
reg = <0x00000 0x0080000>; reg = <0x80000 0x0040000>;
read-only; read-only;
}; };
partition@80000 { partition@c0000 {
label = "ATF"; label = "uboot";
reg = <0x80000 0x0040000>; reg = <0xc0000 0x0080000>;
read-only; read-only;
}; };
partition@c0000 { partition@140000 {
label = "uboot"; label = "uboot-env";
reg = <0xc0000 0x0080000>; reg = <0x140000 0x0080000>;
read-only; read-only;
}; };
partition@140000 { factory: partition@1c0000 {
label = "uboot-env"; label = "factory";
reg = <0x140000 0x0080000>; reg = <0x1c0000 0x0040000>;
read-only; read-only;
}; };
factory: partition@1c0000 { partition@200000 {
label = "factory"; label = "firmware";
reg = <0x1c0000 0x0040000>; reg = <0x200000 0x2000000>;
read-only; };
};
partition@200000 { partition@2200000 {
label = "firmware"; label = "reserved";
reg = <0x200000 0x2000000>; reg = <0x2200000 0x4000000>;
};
partition@2200000 {
label = "reserved";
reg = <0x2200000 0x4000000>;
};
}; };
}; };
}; };

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@ -110,10 +110,6 @@
}; };
}; };
&bch {
status = "okay";
};
&btif { &btif {
status = "okay"; status = "okay";
}; };
@ -342,18 +338,11 @@
}; };
}; };
&snfi { &snand {
mediatek,quad-spi;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>; pinctrl-0 = <&serial_nand_pins>;
status = "okay"; status = "okay";
snand: spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
};
}; };
&spi0 { &spi0 {

View File

@ -6,63 +6,51 @@
compatible = "mediatek,mt7622,ubi"; compatible = "mediatek,mt7622,ubi";
}; };
&snfi { &snand {
pinctrl-names = "default"; partitions {
pinctrl-0 = <&serial_nand_pins>; compatible = "fixed-partitions";
status = "okay";
spi_nand@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
partitions { partition@0 {
compatible = "fixed-partitions"; label = "Preloader";
#address-cells = <1>; reg = <0x00000 0x0080000>;
#size-cells = <1>; read-only;
};
partition@0 { partition@80000 {
label = "Preloader"; label = "ATF";
reg = <0x00000 0x0080000>; reg = <0x80000 0x0040000>;
read-only; };
};
partition@80000 { partition@c0000 {
label = "ATF"; label = "Bootloader";
reg = <0x80000 0x0040000>; reg = <0xc0000 0x0080000>;
}; };
partition@c0000 { partition@140000 {
label = "Bootloader"; label = "Config";
reg = <0xc0000 0x0080000>; reg = <0x140000 0x0080000>;
}; };
partition@140000 { factory: partition@1c0000 {
label = "Config"; label = "Factory";
reg = <0x140000 0x0080000>; reg = <0x1c0000 0x0040000>;
}; };
factory: partition@1c0000 { partition@200000 {
label = "Factory"; label = "kernel";
reg = <0x1c0000 0x0040000>; reg = <0x200000 0x400000>;
}; };
partition@200000 { partition@600000 {
label = "kernel"; label = "ubi";
reg = <0x200000 0x400000>; reg = <0x600000 0x1C00000>;
}; };
partition@600000 { partition@2200000 {
label = "ubi"; label = "User_data";
reg = <0x600000 0x1C00000>; reg = <0x2200000 0x4000000>;
};
partition@2200000 {
label = "User_data";
reg = <0x2200000 0x4000000>;
};
}; };
}; };
}; };

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@ -1,56 +1,40 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -114,7 +114,7 @@ @@ -259,14 +259,32 @@
};
&bch {
- status = "disabled";
+ status = "okay";
};
&btif {
@@ -259,14 +259,40 @@
status = "disabled"; status = "disabled";
}; };
-&nor_flash { -&nor_flash {
+&snfi { +&snand {
pinctrl-names = "default"; pinctrl-names = "default";
- pinctrl-0 = <&spi_nor_pins>; - pinctrl-0 = <&spi_nor_pins>;
- status = "disabled"; - status = "disabled";
+ pinctrl-0 = <&serial_nand_pins>; + pinctrl-0 = <&serial_nand_pins>;
+ mediatek,quad-spi;
+ status = "okay"; + status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x80000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "fip";
+ reg = <0x80000 0x200000>;
+ read-only;
+ };
- flash@0 { - flash@0 {
- compatible = "jedec,spi-nor"; - compatible = "jedec,spi-nor";
+ snand: spi_nand@0 { - reg = <0>;
+ #address-cells = <1>; + partition@280000 {
+ #size-cells = <1>; + label = "ubi";
+ compatible = "spi-nand"; + reg = <0x280000 0x7d80000>;
+ spi-max-frequency = <104000000>;
reg = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x80000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "fip";
+ reg = <0x80000 0x200000>;
+ read-only;
+ };
+
+ partition@280000 {
+ label = "ubi";
+ reg = <0x280000 0x7d80000>;
+ };
+ }; + };
}; };
}; };

View File

@ -11,27 +11,21 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
--- a/arch/arm/boot/dts/mt7629.dtsi --- a/arch/arm/boot/dts/mt7629.dtsi
+++ b/arch/arm/boot/dts/mt7629.dtsi +++ b/arch/arm/boot/dts/mt7629.dtsi
@@ -272,6 +272,28 @@ @@ -272,6 +272,22 @@
status = "disabled"; status = "disabled";
}; };
+ bch: ecc@1100e000 { + snand: snfi@1100d000 {
+ compatible = "mediatek,mt7622-ecc"; + pinctrl-names = "default";
+ reg = <0x1100e000 0x1000>; + pinctrl-0 = <&serial_nand_pins>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>; + compatible = "mediatek,mt7629-snand";
+ clocks = <&pericfg CLK_PERI_NFIECC_PD>; + reg = <0x1100d000 0x1000>, <0x1100e000 0x1000>;
+ clock-names = "nfiecc_clk"; + reg-names = "nfi", "ecc";
+ status = "disabled";
+ };
+
+ snfi: spi@1100d000 {
+ compatible = "mediatek,mt7629-snfi";
+ reg = <0x1100d000 0x1000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_PD>, + clocks = <&pericfg CLK_PERI_NFI_PD>,
+ <&pericfg CLK_PERI_SNFI_PD>; + <&pericfg CLK_PERI_SNFI_PD>,
+ clock-names = "nfi_clk", "spi_clk"; + <&pericfg CLK_PERI_NFIECC_PD>;
+ ecc-engine = <&bch>; + clock-names = "nfi_clk", "pad_clk", "ecc_clk";
+ #address-cells = <1>; + #address-cells = <1>;
+ #size-cells = <0>; + #size-cells = <0>;
+ status = "disabled"; + status = "disabled";
@ -42,27 +36,15 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
"mediatek,mt7622-spi"; "mediatek,mt7622-spi";
--- a/arch/arm/boot/dts/mt7629-rfb.dts --- a/arch/arm/boot/dts/mt7629-rfb.dts
+++ b/arch/arm/boot/dts/mt7629-rfb.dts +++ b/arch/arm/boot/dts/mt7629-rfb.dts
@@ -254,6 +254,52 @@ @@ -254,6 +254,38 @@
}; };
}; };
+&bch { +&snand {
+ status = "okay"; + status = "okay";
+}; + mediatek,quad-spi;
+ +
+&snfi { + partitions {
+ pinctrl-names = "default";
+ pinctrl-0 = <&serial_nand_pins>;
+ status = "okay";
+
+ spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+
+ partitions {
+ compatible = "fixed-partitions"; + compatible = "fixed-partitions";
+ #address-cells = <1>; + #address-cells = <1>;
+ #size-cells = <1>; + #size-cells = <1>;
@ -87,8 +69,6 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
+ label = "firmware"; + label = "firmware";
+ reg = <0x1c0000 0x1000000>; + reg = <0x1c0000 0x1000000>;
+ }; + };
+
+ };
+ }; + };
+}; +};
+ +

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@ -1,17 +1,18 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -561,6 +561,19 @@ @@ -561,6 +561,20 @@
status = "disabled"; status = "disabled";
}; };
+ snfi: spi@1100d000 { + snand: snfi@1100d000 {
+ compatible = "mediatek,mt7622-snfi"; + compatible = "mediatek,mt7622-snand";
+ reg = <0 0x1100d000 0 0x1000>; + reg = <0 0x1100d000 0 0x1000>, <0 0x1100e000 0 0x1000>;
+ reg-names = "nfi", "ecc";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_PD>, + clocks = <&pericfg CLK_PERI_NFI_PD>,
+ <&pericfg CLK_PERI_SNFI_PD>; + <&pericfg CLK_PERI_SNFI_PD>,
+ clock-names = "nfi_clk", "spi_clk"; + <&pericfg CLK_PERI_NFIECC_PD>;
+ ecc-engine = <&bch>; + clock-names = "nfi_clk", "pad_clk", "ecc_clk";
+ #address-cells = <1>; + #address-cells = <1>;
+ #size-cells = <0>; + #size-cells = <0>;
+ status = "disabled"; + status = "disabled";
@ -22,71 +23,55 @@
"mediatek,mt8173-nor"; "mediatek,mt8173-nor";
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -85,7 +85,7 @@ @@ -529,6 +529,55 @@
};
&bch {
- status = "disabled";
+ status = "okay";
};
&btif {
@@ -529,6 +529,62 @@
status = "disabled"; status = "disabled";
}; };
+&snfi { +&snand {
+ mediatek,quad-spi;
+ pinctrl-names = "default"; + pinctrl-names = "default";
+ pinctrl-0 = <&serial_nand_pins>; + pinctrl-0 = <&serial_nand_pins>;
+ status = "okay"; + status = "okay";
+ +
+ spi_nand@0 { + partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>; + #address-cells = <1>;
+ #size-cells = <1>; + #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ +
+ partitions { + partition@0 {
+ compatible = "fixed-partitions"; + label = "Preloader";
+ #address-cells = <1>; + reg = <0x00000 0x0080000>;
+ #size-cells = <1>; + read-only;
+ };
+ +
+ partition@0 { + partition@80000 {
+ label = "Preloader"; + label = "ATF";
+ reg = <0x00000 0x0080000>; + reg = <0x80000 0x0040000>;
+ read-only; + };
+ };
+ +
+ partition@80000 { + partition@c0000 {
+ label = "ATF"; + label = "Bootloader";
+ reg = <0x80000 0x0040000>; + reg = <0xc0000 0x0080000>;
+ }; + };
+ +
+ partition@c0000 { + partition@140000 {
+ label = "Bootloader"; + label = "Config";
+ reg = <0xc0000 0x0080000>; + reg = <0x140000 0x0080000>;
+ }; + };
+ +
+ partition@140000 { + partition@1c0000 {
+ label = "Config"; + label = "Factory";
+ reg = <0x140000 0x0080000>; + reg = <0x1c0000 0x0100000>;
+ }; + };
+ +
+ partition@1c0000 { + partition@200000 {
+ label = "Factory"; + label = "firmware";
+ reg = <0x1c0000 0x0100000>; + reg = <0x2c0000 0x2000000>;
+ }; + };
+ +
+ partition@200000 { + partition@2200000 {
+ label = "firmware"; + label = "User_data";
+ reg = <0x2c0000 0x2000000>; + reg = <0x22c0000 0x4000000>;
+ };
+
+ partition@2200000 {
+ label = "User_data";
+ reg = <0x22c0000 0x4000000>;
+ };
+ }; + };
+ }; + };
+}; +};

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@ -1,15 +1,15 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -567,7 +567,7 @@ @@ -561,7 +561,7 @@
reg = <0x140000 0x0080000>; reg = <0x140000 0x0080000>;
}; };
- partition@1c0000 { - partition@1c0000 {
+ factory: partition@1c0000 { + factory: partition@1c0000 {
label = "Factory"; label = "Factory";
reg = <0x1c0000 0x0100000>; reg = <0x1c0000 0x0100000>;
}; };
@@ -626,5 +626,6 @@ @@ -619,5 +619,6 @@
}; };
&wmac { &wmac {