101 lines
3.0 KiB
Diff
101 lines
3.0 KiB
Diff
|
From 813f2b5ad002e691b92154037f154b4444eedd54 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Robert Marko <robimarko@gmail.com>
|
||
|
|
Date: Sat, 31 Dec 2022 13:03:41 +0100
|
||
|
|
Subject: [PATCH] cpufreq: qcom-nvmem: add support for IPQ8074
|
||
|
|
|
||
|
|
IPQ8074 comes in 2 families:
|
||
|
|
* IPQ8070A/IPQ8071A (Acorn) up to 1.4GHz
|
||
|
|
* IPQ8072A/IPQ8074A/IPQ8076A/IPQ8078A (Hawkeye) up to 2.2GHz
|
||
|
|
|
||
|
|
So, in order to be able to share one OPP table lets add support for IPQ8074
|
||
|
|
family based of SMEM SoC ID-s as speedbin fuse is always 0 on IPQ8074.
|
||
|
|
|
||
|
|
IPQ8074 compatible is blacklisted from DT platdev as the cpufreq device
|
||
|
|
will get created by NVMEM CPUFreq driver.
|
||
|
|
|
||
|
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||
|
|
---
|
||
|
|
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
|
||
|
|
drivers/cpufreq/qcom-cpufreq-nvmem.c | 39 ++++++++++++++++++++++++++++
|
||
|
|
2 files changed, 40 insertions(+)
|
||
|
|
|
||
|
|
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
|
||
|
|
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
|
||
|
|
@@ -159,6 +159,7 @@ static const struct of_device_id blockli
|
||
|
|
{ .compatible = "ti,omap3", },
|
||
|
|
|
||
|
|
{ .compatible = "qcom,ipq8064", },
|
||
|
|
+ { .compatible = "qcom,ipq8074", },
|
||
|
|
{ .compatible = "qcom,apq8064", },
|
||
|
|
{ .compatible = "qcom,msm8974", },
|
||
|
|
{ .compatible = "qcom,msm8960", },
|
||
|
|
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
|
||
|
|
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
|
||
|
|
@@ -32,6 +32,9 @@
|
||
|
|
|
||
|
|
#include <dt-bindings/arm/qcom,ids.h>
|
||
|
|
|
||
|
|
+#define IPQ8074_HAWKEYE_VERSION BIT(0)
|
||
|
|
+#define IPQ8074_ACORN_VERSION BIT(1)
|
||
|
|
+
|
||
|
|
struct qcom_cpufreq_drv;
|
||
|
|
|
||
|
|
struct qcom_cpufreq_match_data {
|
||
|
|
@@ -218,6 +221,37 @@ len_error:
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
+static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev,
|
||
|
|
+ struct nvmem_cell *speedbin_nvmem,
|
||
|
|
+ char **pvs_name,
|
||
|
|
+ struct qcom_cpufreq_drv *drv)
|
||
|
|
+{
|
||
|
|
+ int msm_id;
|
||
|
|
+ *pvs_name = NULL;
|
||
|
|
+
|
||
|
|
+ msm_id = qcom_cpufreq_get_msm_id();
|
||
|
|
+ if (msm_id < 0)
|
||
|
|
+ return msm_id;
|
||
|
|
+
|
||
|
|
+ switch (msm_id) {
|
||
|
|
+ case QCOM_ID_IPQ8070A:
|
||
|
|
+ case QCOM_ID_IPQ8071A:
|
||
|
|
+ drv->versions = IPQ8074_ACORN_VERSION;
|
||
|
|
+ break;
|
||
|
|
+ case QCOM_ID_IPQ8072A:
|
||
|
|
+ case QCOM_ID_IPQ8074A:
|
||
|
|
+ case QCOM_ID_IPQ8076A:
|
||
|
|
+ case QCOM_ID_IPQ8078A:
|
||
|
|
+ drv->versions = IPQ8074_HAWKEYE_VERSION;
|
||
|
|
+ break;
|
||
|
|
+ default:
|
||
|
|
+ BUG();
|
||
|
|
+ break;
|
||
|
|
+ }
|
||
|
|
+
|
||
|
|
+ return 0;
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
static const struct qcom_cpufreq_match_data match_data_kryo = {
|
||
|
|
.get_version = qcom_cpufreq_kryo_name_version,
|
||
|
|
};
|
||
|
|
@@ -232,6 +266,10 @@ static const struct qcom_cpufreq_match_d
|
||
|
|
.genpd_names = qcs404_genpd_names,
|
||
|
|
};
|
||
|
|
|
||
|
|
+static const struct qcom_cpufreq_match_data match_data_ipq8074 = {
|
||
|
|
+ .get_version = qcom_cpufreq_ipq8074_name_version,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
static int qcom_cpufreq_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct qcom_cpufreq_drv *drv;
|
||
|
|
@@ -431,6 +469,7 @@ static const struct of_device_id qcom_cp
|
||
|
|
{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
|
||
|
|
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
|
||
|
|
{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
|
||
|
|
+ { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
|
||
|
|
{ .compatible = "qcom,apq8064", .data = &match_data_krait },
|
||
|
|
{ .compatible = "qcom,msm8974", .data = &match_data_krait },
|
||
|
|
{ .compatible = "qcom,msm8960", .data = &match_data_krait },
|