--- a/gcc/config/avr32/lib1funcs.S
+++ b/gcc/config/avr32/lib1funcs.S
@@ -2271,7 +2271,7 @@ __avr32_f32_div:
 
         tst     r12, r12
         moveq   r9, 0
-        breq    12
+        breq    12f
 
         /* Unpack op1*/ 
         /* exp: r9 */
@@ -2467,9 +2467,14 @@ __divsf_return_op1:     
         reteq   0       /* Return zero if number/inf*/
         ret     -1      /* Return NaN*/
 4:
-        /* Op2 is zero ? */
+        /* Op1 is zero ? */
         tst     r12,r12
         reteq   -1      /* 0.0/0.0 is NaN */
+        /* Op1 is Nan? */
+        lsr     r9, r12, 24
+        breq    11f /*If number is subnormal*/
+        cp      r9, 0xff
+        brhs    2b  /* Check op1 for NaN or Inf */
         /* Nonzero/0.0 is Inf. Sign bit will be shifted in before returning*/
 	mov_imm	r12, 0xff000000
         rjmp    __divsf_return_op1
