118 lines
4.4 KiB
Diff
118 lines
4.4 KiB
Diff
---
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src/syscall-sparc64.h | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++
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src/syscall.h | 2 +
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2 files changed, 100 insertions(+)
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--- a/src/syscall.h
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+++ b/src/syscall.h
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@@ -24,6 +24,8 @@
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#include "syscall-alpha.h"
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#elif defined(__arm__)
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#include "syscall-arm.h"
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+#elif defined(__sparc__) && defined(__arch64__)
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+#include "syscall-sparc64.h"
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#elif defined(__sparc__)
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#include "syscall-sparc.h"
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#elif defined(__aarch64__)
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--- /dev/null
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+++ b/src/syscall-sparc64.h
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@@ -0,0 +1,98 @@
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+#define __NR_io_setup 268
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+#define __NR_io_destroy 269
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+#define __NR_io_submit 270
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+#define __NR_io_cancel 271
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+#define __NR_io_getevents 272
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+
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+#define io_syscall1(type,fname,sname,type1,arg1) \
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+type fname(type1 arg1) \
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+{ \
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+ unsigned long __res; \
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+ register unsigned long __g1 __asm__("g1") = __NR_##sname; \
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+ register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
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+ __asm__ __volatile__("t 0x6d\n\t" \
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+ "sub %%g0, %%o0, %0\n\t" \
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+ "movcc %%xcc, %%o0, %0\n" \
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+ "1:" \
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+ : "=r" (__res), "=&r" (__o0) \
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+ : "1" (__o0), "r" (__g1) \
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+ : "cc"); \
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+ return (type) __res; \
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+}
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+
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+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
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+type fname(type1 arg1, type2 arg2) \
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+{ \
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+ unsigned long __res; \
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+ register unsigned long __g1 __asm__("g1") = __NR_##sname; \
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+ register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
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+ register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
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+ __asm__ __volatile__("t 0x6d\n\t" \
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+ "sub %%g0, %%o0, %0\n\t" \
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+ "movcc %%xcc, %%o0, %0\n" \
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+ "1:" \
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+ : "=r" (__res), "=&r" (__o0) \
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+ : "1" (__o0), "r" (__o1), "r" (__g1) \
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+ : "cc"); \
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+ return (type) __res; \
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+}
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+
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+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
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+type fname(type1 arg1, type2 arg2, type3 arg3) \
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+{ \
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+ unsigned long __res; \
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+ register unsigned long __g1 __asm__("g1") = __NR_##sname; \
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+ register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
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+ register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
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+ register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
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+ __asm__ __volatile__("t 0x6d\n\t" \
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+ "sub %%g0, %%o0, %0\n\t" \
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+ "movcc %%xcc, %%o0, %0\n" \
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+ "1:" \
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+ : "=r" (__res), "=&r" (__o0) \
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+ : "1" (__o0), "r" (__o1), "r" (__o2), \
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+ "r" (__g1) \
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+ : "cc"); \
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+ return (type) __res; \
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+}
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+
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+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
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+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
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+{ \
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+ unsigned long __res; \
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+ register unsigned long __g1 __asm__("g1") = __NR_##sname; \
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+ register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
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+ register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
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+ register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
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+ register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
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+ __asm__ __volatile__("t 0x6d\n\t" \
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+ "sub %%g0, %%o0, %0\n\t" \
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+ "movcc %%xcc, %%o0, %0\n" \
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+ "1:" \
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+ : "=r" (__res), "=&r" (__o0) \
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+ : "1" (__o0), "r" (__o1), "r" (__o2), \
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+ "r" (__o3), "r" (__g1) \
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+ : "cc"); \
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+ return (type) __res; \
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+}
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+
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+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
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+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
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+{ \
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+ unsigned long __res; \
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+ register unsigned long __g1 __asm__("g1") = __NR_##sname; \
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+ register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
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+ register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
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+ register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
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+ register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
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+ register unsigned long __o4 __asm__("o4") = (unsigned long) arg5; \
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+ __asm__ __volatile__("t 0x6d\n\t" \
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+ "sub %%g0, %%o0, %0\n\t" \
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+ "movcc %%xcc, %%o0, %0\n" \
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+ "1:" \
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+ : "=r" (__res), "=&r" (__o0) \
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+ : "1" (__o0), "r" (__o1), "r" (__o2), \
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+ "r" (__o3), "r" (__o4), "r" (__g1) \
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+ : "cc"); \
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+ return (type) __res; \
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+}
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