From facbe16f6981dccaf682980a2cb18790d6eae0d2 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 30 Jan 2022 13:03:13 +0100 Subject: [PATCH 12/18] mvebu: add Amethyst specific SMI setup Amethyst switches require different external SMI GPIO setup then other switches, so provide it since RB5009 uses the external SMI bus. Signed-off-by: Robert Marko --- ...x-add-Amethyst-specific-SMI-GPIO-fun.patch | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 target/linux/mvebu/patches-5.15/706-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch diff --git a/target/linux/mvebu/patches-5.15/706-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch b/target/linux/mvebu/patches-5.15/706-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch new file mode 100644 index 0000000000..248b8b9d6c --- /dev/null +++ b/target/linux/mvebu/patches-5.15/706-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch @@ -0,0 +1,95 @@ +From 40aa82107e7b1e7f20cbf6e644005c0c606f9f79 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Fri, 14 Jan 2022 15:17:37 +0100 +Subject: [PATCH] net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO function + +The existing mv88e6xxx_g2_scratch_gpio_set_smi() cannot be used on the +88E6393X as it requires certain P0_MODE, it also checks the CPU mode +as it impacts the bit setting value. + +This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only +the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap +pin value but it can be changed without restrictions so that GPIO pins +9 and 10 are used as SMI pins. + +So, introduce Amethyst specific function and call that if the Amethyst +family wants to setup the external PHY. + +Signed-off-by: Robert Marko +--- + drivers/net/dsa/mv88e6xxx/chip.c | 5 +++- + drivers/net/dsa/mv88e6xxx/global2.h | 2 ++ + drivers/net/dsa/mv88e6xxx/global2_scratch.c | 31 +++++++++++++++++++++ + 3 files changed, 37 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c +index 43d126628610..b3803101d612 100644 +--- a/drivers/net/dsa/mv88e6xxx/chip.c ++++ b/drivers/net/dsa/mv88e6xxx/chip.c +@@ -3409,7 +3409,10 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip, + + if (external) { + mv88e6xxx_reg_lock(chip); +- err = mv88e6xxx_g2_scratch_gpio_set_smi(chip, true); ++ if (chip->info->family == MV88E6XXX_FAMILY_6393) ++ err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true); ++ else ++ err = mv88e6xxx_g2_scratch_gpio_set_smi(chip, true); + mv88e6xxx_reg_unlock(chip); + + if (err) +diff --git a/drivers/net/dsa/mv88e6xxx/global2.h b/drivers/net/dsa/mv88e6xxx/global2.h +index f3e27573a386..e0649f21f28e 100644 +--- a/drivers/net/dsa/mv88e6xxx/global2.h ++++ b/drivers/net/dsa/mv88e6xxx/global2.h +@@ -370,6 +370,8 @@ extern const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops; + + int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, + bool external); ++int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, ++ bool external); + int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin); + int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats); + +diff --git a/drivers/net/dsa/mv88e6xxx/global2_scratch.c b/drivers/net/dsa/mv88e6xxx/global2_scratch.c +index eda710062933..dc3f4645fa52 100644 +--- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c ++++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c +@@ -289,3 +289,34 @@ int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, + + return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val); + } ++ ++/** ++ * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi ++ * @chip: chip private data ++ * @external: set mux for external smi, or free for gpio usage ++ * ++ * MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an ++ * external SMI interface or as regular GPIO-s. ++ * ++ * They however have a different register layout then the existing ++ * function. ++ */ ++ ++int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, ++ bool external) ++{ ++ int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG; ++ int err; ++ u8 val; ++ ++ err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val); ++ if (err) ++ return err; ++ ++ if (external) ++ val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; ++ else ++ val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; ++ ++ return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val); ++} +-- +2.34.1 + -- 2.42.1