forked from freifunk-franken/firmware
440 lines
9.3 KiB
Diff
440 lines
9.3 KiB
Diff
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From 4994d15a2708e3c2e5df3d91061a4899cb44a979 Mon Sep 17 00:00:00 2001
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From: Serhii Serhieiev <adron@mstnt.com>
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Date: Wed, 9 Feb 2022 09:45:47 +0200
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Subject: [PATCH 03/18] mvebu: mvebu: add support for RB5009UG+S+IN.
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This patch adds support for Mikrotik RB5009UG+S+IN.
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Specifications:
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- SoC: Marvell Armada 7040 (88F7040) - 4 cores, ARMv8, 1.4GHz, 64bit
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- RAM: 1024MB DDR4
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- Flash: 16MB SPI NOR flash, 1024MB NAND
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- Ethernet: One Marvell 88E6393X - Amethyst: one 2.5G + seven 1G ports and one SFP+
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- LED: User, SFP, Hdr1, Hdr2
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- Buttons: Reset
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- UART: 115200 8n1
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- USB: One USB3 port
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Signed-off-by: Serhii Serhieiev <adron@mstnt.com>
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---
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.../base-files/etc/board.d/02_network | 3 +
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.../base-files/lib/upgrade/platform.sh | 4 +
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.../boot/dts/marvell/armada-7040-rb5009.dts | 377 ++++++++++++++++++
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3 files changed, 384 insertions(+)
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create mode 100644 target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
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diff --git a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
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index 6a5861084e..ccb89add24 100644
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--- a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
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+++ b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
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@@ -32,6 +32,9 @@ marvell,armada7040-db)
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marvell,armada8040-clearfog-gt-8k)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 eth2" "eth0 eth1"
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;;
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+mikrotik,rb5009)
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+ ucidef_set_interfaces_lan_wan "p2 p3 p4 p5 p6 p7 p8" "sfp p1"
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+ ;;
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*)
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ucidef_set_interface_lan "eth0"
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;;
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diff --git a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
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index dc964a3117..d61e937cdc 100755
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--- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
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+++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
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@@ -35,6 +35,10 @@ platform_do_upgrade() {
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marvell,armada8040-clearfog-gt-8k)
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legacy_sdcard_do_upgrade "$1"
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;;
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+ mikrotik,rb5009)
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+ PART_NAME=firmware
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+ default_do_upgrade "$1"
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+ ;;
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*)
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default_do_upgrade "$1"
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;;
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diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
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new file mode 100644
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index 0000000000..66c74451f0
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--- /dev/null
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+++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
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@@ -0,0 +1,377 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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+
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+/dts-v1/;
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+
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+#include "armada-7040.dtsi"
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+
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+/ {
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+ model = "MikroTik RB5009";
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+ compatible = "mikrotik,rb5009", "marvell,armada7040",
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+ "marvell,armada-ap806-quad", "marvell,armada-ap806";
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x0 0x0 0x0 0x40000000>;
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+ };
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+
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+ aliases {
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+ led-boot = &led_user;
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+ led-failsafe = &led_user;
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+ led-running = &led_user;
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+ led-upgrade = &led_user;
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+ };
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+
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+ sfp_i2c: sfp-i2c {
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+ compatible = "i2c-gpio";
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+ sda-gpios = <&cp0_gpio1 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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+ scl-gpios = <&cp0_gpio1 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+
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+ reset {
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+ label = "reset";
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+ gpios = <&cp0_gpio1 28 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_RESTART>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led_user: user {
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+ label = "green:user";
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+ gpios = <&cp0_gpio2 26 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ sfp {
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+ label = "green:sfp";
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+ gpios = <&cp0_gpio2 25 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ hdr1 {
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+ label = "blue:hdr1";
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+ gpios = <&cp0_gpio1 4 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ hdr2 {
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+ label = "blue:hdr2";
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+ gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ sfp: sfp {
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+ compatible = "sff,sfp";
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+ i2c-bus = <&sfp_i2c>;
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+ };
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+};
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+
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+&uart0 {
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+ status = "okay";
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+
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+ pinctrl-0 = <&uart0_pins>;
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+ pinctrl-names = "default";
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+};
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+
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+
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+&spi0 {
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+ status = "okay";
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+
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+ spi-flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <20000000>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "ATF";
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+ reg = <0x0 0x95c04>;
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+ read-only;
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+ };
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+ partition@1 {
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+ label = "backup_RouterBOOT";
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+ reg = <0x95c04 0x193FC>;
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+ read-only;
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+ };
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+ hard_config: partition@2 {
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+ label = "hard_config";
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+ reg = <0xaf000 0x1000>;
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+ read-only;
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+ };
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+ partition@3 {
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+ label = "RouterBOOT";
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+ reg = <0xb0000 0x10000>;
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+ };
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+ partition@4 {
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+ label = "soft_config";
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+ reg = <0xc0000 0x10000>;
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+ };
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+ partition@5 {
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+ label = "DTS";
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+ reg = <0xd0000 0x10000>;
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+ read-only;
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+ };
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+ partition@6 {
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+ label = "free_space";
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+ reg = <0xe0000 0x20000>;
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+ };
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+ partition@7 {
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+ compatible = "denx,fit";
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+ label = "firmware";
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+ reg = <0x100000 0xf00000>;
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+ };
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+ partition@8 {
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+ label = "first_1M";
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+ reg = <0x0 0x100000>;
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+ };
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+ };
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+ };
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+};
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+
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+&cp0_nand_controller {
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+ status = "okay";
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+
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+ nand@0 {
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+ reg = <0>;
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+ nand-rb = <0>;
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+ nand-ecc-mode = "hw";
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+ nand-ecc-strength = <4>;
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+ nand-ecc-step-size = <512>;
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+ nand-on-flash-bbt;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "RouterBoard NAND Boot";
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+ reg = <0x0 0x800000>;
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+ };
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+
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+ partition@800000 {
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+ label = "RouterBoard NAND Main";
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+ reg = <0x800000 0x3f800000>;
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+ };
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+ };
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+ };
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+};
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+
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+&cp0_gpio2 {
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+ enable-usb-power {
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+ gpio-hog;
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+ gpios = <23 GPIO_ACTIVE_HIGH>;
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+ output-high;
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+ line-name = "enable USB power";
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+ };
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+
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+ enable-leds-power {
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+ gpio-hog;
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+ gpios = <27 GPIO_ACTIVE_HIGH>;
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+ output-high;
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+ line-name = "enable LED-s power";
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+ };
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+};
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+
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+&cp0_usb3_1 {
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+ status = "okay";
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+};
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+
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+&cp0_i2c0 {
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+ status = "okay";
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+ clock-frequency = <100000>;
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+};
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+
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+&cp0_mdio {
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+ status = "okay";
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+};
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+
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+&cp0_ethernet {
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+ status = "okay";
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+};
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+
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+&cp0_eth0 {
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+ /* This port is connected to 88E6393X switch */
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+ status = "okay";
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+ phy-mode = "10gbase-r";
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+ managed = "in-band-status";
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <0>;
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+};
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+
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+&cp0_mdio {
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+ status = "okay";
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+
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+ switch@0 {
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+ /* Actual device is MV88E6393X */
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+ compatible = "marvell,mv88e6190";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0>;
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+ //strict-cpu-mode = <1>;
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+ //reset-gpios = <&cp0_gpio2 2 GPIO_ACTIVE_HIGH>;
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ port@0 {
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+ reg = <0>;
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+ label = "cpu";
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+ ethernet = <&cp0_eth0>;
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+ };
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+
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+ port@1 {
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+ reg = <1>;
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+ label = "p8";
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+ phy-handle = <&switch0phy1>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <7>;
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+ };
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+
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+ port@2 {
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+ reg = <2>;
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+ label = "p7";
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+ phy-handle = <&switch0phy2>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <6>;
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+ };
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+
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+ port@3 {
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+ reg = <3>;
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+ label = "p6";
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+ phy-handle = <&switch0phy3>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <5>;
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+ };
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+
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+ port@4 {
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+ reg = <4>;
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+ label = "p5";
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+ phy-handle = <&switch0phy4>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <4>;
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+ };
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+
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+ port@5 {
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+ reg = <5>;
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+ label = "p4";
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+ phy-handle = <&switch0phy5>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <3>;
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+ };
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+
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+ port@6 {
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+ reg = <6>;
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+ label = "p3";
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+ phy-handle = <&switch0phy6>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <2>;
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+ };
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+
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+ port@7 {
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+ reg = <7>;
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+ label = "p2";
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+ phy-handle = <&switch0phy7>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <1>;
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+ };
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+
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+ port@9 {
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+ reg = <9>;
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+ label = "p1";
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+ phy-mode = "sgmii";
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+ phy-handle = <&switch0phy9>;
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+ managed = "in-band-status";
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <0>;
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+ };
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+
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+ port@a {
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+ reg = <10>;
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+ label = "sfp";
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+ phy-mode = "10gbase-r";
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+ managed = "in-band-status";
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+ sfp = <&sfp>;
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+ nvmem-cells = <&macaddr_hard>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <8>;
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+ };
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+ };
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+
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+ mdio {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ switch0phy1: switch0phy1@1 {
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+ reg = <0x1>;
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+ };
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+
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+ switch0phy2: switch0phy2@2 {
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+ reg = <0x2>;
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+ };
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+
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+ switch0phy3: switch0phy3@3 {
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+ reg = <0x3>;
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+ };
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+
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+ switch0phy4: switch0phy4@4 {
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+ reg = <0x4>;
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+ };
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+
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+ switch0phy5: switch0phy5@5 {
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+ reg = <0x5>;
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+ };
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+
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+ switch0phy6: switch0phy6@6 {
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+ reg = <0x6>;
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+ };
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+
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+ switch0phy7: switch0phy7@7 {
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+ reg = <0x7>;
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+ };
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+ };
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+
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+ mdio1 {
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+ compatible = "marvell,mv88e6xxx-mdio-external";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
|
||
|
+
|
||
|
+ switch0phy9: switch0phy9@0 {
|
||
|
+ reg = <0>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&hard_config {
|
||
|
+ compatible = "nvmem-cells";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <1>;
|
||
|
+
|
||
|
+ macaddr_hard: macaddr@10 {
|
||
|
+ reg = <0x10 0x6>;
|
||
|
+ };
|
||
|
+};
|
||
|
--
|
||
|
2.42.1
|
||
|
|