forked from freifunk-franken/firmware
83 lines
3.2 KiB
Diff
83 lines
3.2 KiB
Diff
From 34f12f102eae3effcbd3455d327615589c1de613 Mon Sep 17 00:00:00 2001
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From: Matthias Schiffer <mschiffer@universe-factory.net>
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Date: Thu, 22 Oct 2015 00:33:25 +0200
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Subject: [PATCH 2/2] ar71xx: fix ath79_soc_rev value for QCA9531 ver. 2
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ath9k expects to get revision id 2 for the QCA9531 ver. 2 rev. 0. This
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fixes the very low TX power on some devices like the TP-LINK
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TL-WR841ND v10.
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As ath79_soc_rev is only used to get the revision number to ath9k on the
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QCA9533, just set it to the expected value on the ver. 2.
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rebased on dc3c0b7c35c53d6a81f6ac5aeb95c64dc1f9f80c
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- Tim Niemeyer
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---
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.../707-MIPS-ath79-add-support-for-QCA953x-SoC.patch | 11 ++++++++---
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.../735-MIPS-ath79-add-support-for-QCA956x-SoC.patch | 7 ++++---
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2 files changed, 12 insertions(+), 6 deletions(-)
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diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
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index b44e884..ac54696 100644
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--- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
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+++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
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@@ -292,12 +292,13 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
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id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
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major = id & REV_ID_MAJOR_MASK;
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-@@ -151,6 +152,16 @@ static void __init ath79_detect_sys_type
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+@@ -151,6 +152,17 @@ static void __init ath79_detect_sys_type
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rev = id & AR934X_REV_ID_REVISION_MASK;
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break;
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+ case REV_ID_MAJOR_QCA9533_V2:
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+ ver = 2;
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++ ath79_soc_rev = 2;
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+ /* drop through */
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+
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+ case REV_ID_MAJOR_QCA9533:
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@@ -309,9 +310,13 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
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case REV_ID_MAJOR_QCA9556:
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ath79_soc = ATH79_SOC_QCA9556;
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chip = "9556";
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-@@ -169,9 +180,9 @@ static void __init ath79_detect_sys_type
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+@@ -169,11 +180,12 @@ static void __init ath79_detect_sys_type
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+ panic("ath79: unknown SoC, id:0x%08x", id);
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+ }
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- ath79_soc_rev = rev;
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+- ath79_soc_rev = rev;
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++ if (ver == 1)
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++ ath79_soc_rev = rev;
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- if (soc_is_qca955x())
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- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
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diff --git a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
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index 8f15790..04cf016 100644
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--- a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
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+++ b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
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@@ -519,7 +519,7 @@
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return -ENODEV;
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--- a/arch/mips/ath79/setup.c
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+++ b/arch/mips/ath79/setup.c
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-@@ -175,15 +175,30 @@ static void __init ath79_detect_sys_type
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+@@ -175,6 +175,18 @@ static void __init ath79_detect_sys_type
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rev = id & QCA955X_REV_ID_REVISION_MASK;
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break;
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@@ -538,8 +538,9 @@
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default:
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panic("ath79: unknown SoC, id:0x%08x", id);
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}
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-
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- ath79_soc_rev = rev;
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+@@ -183,9 +195,12 @@ static void __init ath79_detect_sys_type
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+ if (ver == 1)
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+ ath79_soc_rev = rev;
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- if (soc_is_qca953x() || soc_is_qca955x())
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+ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561())
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--
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2.1.4
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