buildscript: bump openwrt: 841v10 is now mainline

Signed-off-by: Tim Niemeyer <tim.niemeyer@mastersword.de>
Reviewed-by: Steffen Pankratz <kratz00@gmx.de>
This commit is contained in:
Tim Niemeyer 2015-12-06 13:34:55 +01:00 committed by Steffen Pankratz
parent bcf51e6116
commit 3031d176c4
3 changed files with 1 additions and 124 deletions

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@ -1,39 +0,0 @@
From 4c385c25f262a74dfbd92add500f4a8814f79748 Mon Sep 17 00:00:00 2001
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Sun, 11 Oct 2015 18:00:27 +0200
Subject: [PATCH 1/2] ar71xx: add support for TP-LINK TL-WR841N/ND v10
---
target/linux/ar71xx/image/Makefile | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/linux/ar71xx/image/Makefile b/target/linux/ar71xx/image/Makefile
index 013a215..95d9a08 100644
--- a/target/linux/ar71xx/image/Makefile
+++ b/target/linux/ar71xx/image/Makefile
@@ -546,6 +546,13 @@ define Device/tl-wr841n-v9
TPLINK_HWID := 0x08410009
endef
+define Device/tl-wr841n-v10
+ $(Device/tplink-4mlzma)
+ BOARDNAME := TL-WR841N-v9
+ DEVICE_PROFILE := TLWR841
+ TPLINK_HWID := 0x08410010
+endef
+
define Device/tl-wr842n-v2
$(Device/tplink-8mlzma)
BOARDNAME := TL-WR842N-v2
@@ -566,7 +573,7 @@ define Device/tl-wr847n-v8
DEVICE_PROFILE := TLWR841
TPLINK_HWID := 0x08470008
endef
-TARGET_DEVICES += tl-wr841n-v8 tl-wr841n-v9 tl-wr842n-v2 tl-wr843nd-v1 tl-wr847n-v8
+TARGET_DEVICES += tl-wr841n-v8 tl-wr841n-v9 tl-wr841n-v10 tl-wr842n-v2 tl-wr843nd-v1 tl-wr847n-v8
define Device/tl-wr941nd-v5
$(Device/tplink-4mlzma)
--
2.1.4

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@ -1,82 +0,0 @@
From 34f12f102eae3effcbd3455d327615589c1de613 Mon Sep 17 00:00:00 2001
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Thu, 22 Oct 2015 00:33:25 +0200
Subject: [PATCH 2/2] ar71xx: fix ath79_soc_rev value for QCA9531 ver. 2
ath9k expects to get revision id 2 for the QCA9531 ver. 2 rev. 0. This
fixes the very low TX power on some devices like the TP-LINK
TL-WR841ND v10.
As ath79_soc_rev is only used to get the revision number to ath9k on the
QCA9533, just set it to the expected value on the ver. 2.
rebased on dc3c0b7c35c53d6a81f6ac5aeb95c64dc1f9f80c
- Tim Niemeyer
---
.../707-MIPS-ath79-add-support-for-QCA953x-SoC.patch | 11 ++++++++---
.../735-MIPS-ath79-add-support-for-QCA956x-SoC.patch | 7 ++++---
2 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
index b44e884..ac54696 100644
--- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
+++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
@@ -292,12 +292,13 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
major = id & REV_ID_MAJOR_MASK;
-@@ -151,6 +152,16 @@ static void __init ath79_detect_sys_type
+@@ -151,6 +152,17 @@ static void __init ath79_detect_sys_type
rev = id & AR934X_REV_ID_REVISION_MASK;
break;
+ case REV_ID_MAJOR_QCA9533_V2:
+ ver = 2;
++ ath79_soc_rev = 2;
+ /* drop through */
+
+ case REV_ID_MAJOR_QCA9533:
@@ -309,9 +310,13 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
case REV_ID_MAJOR_QCA9556:
ath79_soc = ATH79_SOC_QCA9556;
chip = "9556";
-@@ -169,9 +180,9 @@ static void __init ath79_detect_sys_type
+@@ -169,11 +180,12 @@ static void __init ath79_detect_sys_type
+ panic("ath79: unknown SoC, id:0x%08x", id);
+ }
- ath79_soc_rev = rev;
+- ath79_soc_rev = rev;
++ if (ver == 1)
++ ath79_soc_rev = rev;
- if (soc_is_qca955x())
- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
diff --git a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
index 8f15790..04cf016 100644
--- a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
+++ b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
@@ -519,7 +519,7 @@
return -ENODEV;
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
-@@ -175,15 +175,30 @@ static void __init ath79_detect_sys_type
+@@ -175,6 +175,18 @@ static void __init ath79_detect_sys_type
rev = id & QCA955X_REV_ID_REVISION_MASK;
break;
@@ -538,8 +538,9 @@
default:
panic("ath79: unknown SoC, id:0x%08x", id);
}
-
- ath79_soc_rev = rev;
+@@ -183,9 +195,12 @@ static void __init ath79_detect_sys_type
+ if (ver == 1)
+ ath79_soc_rev = rev;
- if (soc_is_qca953x() || soc_is_qca955x())
+ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561())
--
2.1.4

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@ -13,7 +13,7 @@
builddir=./build
OPENWRTREV="c5287f92027e9709262d2424bb0c121ab2a7597e"
OPENWRTREV="1cd5709e5d9d6e73eb501f1f2840379aa8d171db"
OPENWRTURL="git://git.openwrt.org/15.05/openwrt.git"
PACKAGEREV="ee0bb7b9df86cec0f1d7c27046c50b1fc45b7c4f"
PACKAGEURL="https://github.com/openwrt/packages.git"
@ -76,8 +76,6 @@ get_source() {
#Get the OpenWrt Core Source for Firmware
checkout_git openwrt $OPENWRTURL $OPENWRTREV
git -C openwrt am --whitespace=nowarn ../../build_patches/0001-ar71xx-add-support-for-TP-LINK-TL-WR841N-ND-v10.patch
git -C openwrt am --whitespace=nowarn ../../build_patches/0002-ar71xx-fix-ath79_soc_rev-value-for-QCA9531-ver.-2.patch
test -d packages || mkdir packages
cd packages